M bitsy/clock.c => bitsy/clock.c +6 -1
@@ 25,6 25,7 @@ void
clockinit(void)
{
ulong x;
+ ulong id;
/* map the clock registers */
timerregs = mapspecial(OSTIMERREGS, 32);
@@ 39,7 40,11 @@ clockinit(void)
conf.hz = ClockFreq*(x*4+16);
conf.mhz = (conf.hz+499999)/1000000;
- print("%lud MHZ WeakARM\n", conf.mhz);
+ /* get processor type */
+ id = getcpuid();
+
+ print("%lud MHZ ARM, version %ux part %ux stepping %uxd\n", conf.mhz,
+ (id>>16)&0xff, (id>>4)&0xfff, id&0xf);
/* post interrupt 1/HZ secs from now */
timerregs->osmr[0] = timerregs->oscr + ClockFreq/HZ;
M bitsy/l.s => bitsy/l.s +0 -5
@@ 139,11 139,6 @@ TEXT getfar(SB), $-4
MRC CpMMU, 0, R0, C(CpFAR), C(0x0)
RET
-/* return fault address */
-TEXT putfar(SB), $-4
- MRC CpMMU, 0, R0, C(CpFAR), C(0x0)
- RET
-
/* set the translation table base */
TEXT putttb(SB), $-4
MCR CpMMU, 0, R0, C(CpTTB), C(0x0)
M bitsy/power.c => bitsy/power.c +1 -1
@@ 76,5 76,5 @@ idlehands(void)
void
idlehands(void)
{
- doze();
+// doze();
}