From e4dd5fe39c81958d121d9f5862dc88530e8fe8bd Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Sat, 24 Mar 2001 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 2001-03-24

---
 bitsy/clock.c | 7 ++++++-
 bitsy/l.s     | 5 -----
 bitsy/power.c | 2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/bitsy/clock.c b/bitsy/clock.c
index 47a318ad260cffe0bf00a4a9e30a4f376ca020fd..eb7bec65fce2ca135ae99024ca6117bf9b0b10d4 100644
--- a/bitsy/clock.c
+++ b/bitsy/clock.c
@@ -25,6 +25,7 @@ void
 clockinit(void)
 {
 	ulong x;
+	ulong id;
 
 	/* map the clock registers */
 	timerregs = mapspecial(OSTIMERREGS, 32);
@@ -39,7 +40,11 @@ clockinit(void)
 	conf.hz = ClockFreq*(x*4+16);
 	conf.mhz = (conf.hz+499999)/1000000;
 
-	print("%lud MHZ WeakARM\n", conf.mhz);
+	/* get processor type */
+	id = getcpuid();
+
+	print("%lud MHZ ARM, version %ux part %ux stepping %uxd\n", conf.mhz,
+		(id>>16)&0xff, (id>>4)&0xfff, id&0xf);
 
 	/* post interrupt 1/HZ secs from now */
 	timerregs->osmr[0] = timerregs->oscr + ClockFreq/HZ;
diff --git a/bitsy/l.s b/bitsy/l.s
index a5b85223c9ea47b52d7fc5091c6f19328157e567..2ef3f0f858ba577999bad430651083774efedb03 100644
--- a/bitsy/l.s
+++ b/bitsy/l.s
@@ -139,11 +139,6 @@ TEXT getfar(SB), $-4
 	MRC	CpMMU, 0, R0, C(CpFAR), C(0x0)
 	RET
 
-/* return fault address */
-TEXT putfar(SB), $-4
-	MRC	CpMMU, 0, R0, C(CpFAR), C(0x0)
-	RET
-
 /* set the translation table base */
 TEXT putttb(SB), $-4
 	MCR	CpMMU, 0, R0, C(CpTTB), C(0x0)
diff --git a/bitsy/power.c b/bitsy/power.c
index f44db8995b515f331585f22af89c16443b242996..06040876c8a9ae208c8c698db74c69c42b499f97 100644
--- a/bitsy/power.c
+++ b/bitsy/power.c
@@ -76,5 +76,5 @@ idlehands(void)
 void
 idlehands(void)
 {
-	doze();
+//	doze();
 }