M carrera/dat.h => carrera/dat.h +1 -0
@@ 154,6 154,7 @@ struct
Lock;
short machs;
short exiting;
+ short ispanic;
}active;
/*
M carrera/l.s => carrera/l.s +10 -1
@@ 770,9 770,18 @@ ccache:
BGTZ R9, ccache
MOVW R10, M(STATUS)
WAIT
+
+ /*
+ * set up 32 byte primary cache line sizes,
+ * kseg0 cache mode,
+ * and store conditional using tlb cache mode
+ */
MOVW M(CONFIG), R1
- OR $((1<<4)|(1<<5)), R1
+ WAIT
+ AND $~0x3f, R1
+ OR $((1<<4)|(1<<5)|(PTECOHERXCLW>>3)), R1
MOVW R1, M(CONFIG)
+ WAIT
RET
TEXT getcallerpc(SB), $0
M carrera/main.c => carrera/main.c +8 -1
@@ 31,6 31,7 @@ Softtlb stlb[MAXMACH][STLBSIZE];
Conf conf;
FPsave initfp;
+int configreg;
int int0mask = 0xff; /* interrupts enabled for first 8259 */
int int1mask = 0xff; /* interrupts enabled for second 8259 */
@@ 56,6 57,7 @@ main(void)
vecinit();
screeninit();
/* iprint("\n\nBrazil\n"); /**/
+ print("Brazil config reg %#lux\n", configreg);
pageinit();
procinit0();
initseg();
@@ 144,7 146,7 @@ machinit(void)
clrfpintr();
/* scrub cache */
- ((void(*)(void))((ulong)cleancache|0xA0000000))();
+ configreg = ((int(*)(void))((ulong)cleancache|0xA0000000))();
memset(m, 0, sizeof(Mach));
@@ 414,6 416,11 @@ exit(int type)
USED(type);
+ lock(&active);
+ active.machs &= ~(1<<m->machno);
+ active.exiting = 1;
+ unlock(&active);
+
spllo();
print("cpu%d exiting\n", m->machno);
while(consactive())
M carrera/mem.h => carrera/mem.h +1 -1
@@ 22,7 22,7 @@
/*
* Time
*/
-#define HZ 100 /* clock frequency */
+#define HZ 1000 /* clock frequency */
#define MS2HZ (1000/HZ) /* millisec per clock tick */
#define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
#define TK2MS(t) ((t)*MS2HZ) /* ticks to milliseconds */
M port/devcons.c => port/devcons.c +3 -1
@@ 924,8 924,10 @@ genrandom(void*)
for(;;){
for(;;)
- if(++rb.randomcount > 1000000)
+ if(++rb.randomcount > 100000)
break;
+ if(anyhigher())
+ sched();
if(!rbnotfull(0))
sleep(&rb.producer, rbnotfull, 0);
}