From d324fc30076c3927e4528eb1b98a0fdb472eae5e Mon Sep 17 00:00:00 2001 From: David du Colombier <0intro@gmail.com> Date: Wed, 10 Jun 1998 00:00:00 +0000 Subject: [PATCH] Plan 9 from Bell Labs 1998-06-10 --- carrera/dat.h | 1 + carrera/l.s | 11 ++++++++++- carrera/main.c | 9 ++++++++- carrera/mem.h | 2 +- port/devcons.c | 4 +++- 5 files changed, 23 insertions(+), 4 deletions(-) diff --git a/carrera/dat.h b/carrera/dat.h index b340c7bfa21fcc38cefde1cca3c21e861c64b380..8b63611a6e7af1eacd3bb2925d5386461ddcce2f 100644 --- a/carrera/dat.h +++ b/carrera/dat.h @@ -154,6 +154,7 @@ struct Lock; short machs; short exiting; + short ispanic; }active; /* diff --git a/carrera/l.s b/carrera/l.s index 9b4b363e7bb3864a062a287b1dcdd64c3e0f44f3..c7e8594e438349c5b35d85afc9efacbfc438dcfb 100644 --- a/carrera/l.s +++ b/carrera/l.s @@ -770,9 +770,18 @@ ccache: BGTZ R9, ccache MOVW R10, M(STATUS) WAIT + + /* + * set up 32 byte primary cache line sizes, + * kseg0 cache mode, + * and store conditional using tlb cache mode + */ MOVW M(CONFIG), R1 - OR $((1<<4)|(1<<5)), R1 + WAIT + AND $~0x3f, R1 + OR $((1<<4)|(1<<5)|(PTECOHERXCLW>>3)), R1 MOVW R1, M(CONFIG) + WAIT RET TEXT getcallerpc(SB), $0 diff --git a/carrera/main.c b/carrera/main.c index de4512f03e2d230de6bb7fd15064a34be1d0b4a0..2400fb08524cd3223a342e32a761cada4d201283 100644 --- a/carrera/main.c +++ b/carrera/main.c @@ -31,6 +31,7 @@ Softtlb stlb[MAXMACH][STLBSIZE]; Conf conf; FPsave initfp; +int configreg; int int0mask = 0xff; /* interrupts enabled for first 8259 */ int int1mask = 0xff; /* interrupts enabled for second 8259 */ @@ -56,6 +57,7 @@ main(void) vecinit(); screeninit(); /* iprint("\n\nBrazil\n"); /**/ + print("Brazil config reg %#lux\n", configreg); pageinit(); procinit0(); initseg(); @@ -144,7 +146,7 @@ machinit(void) clrfpintr(); /* scrub cache */ - ((void(*)(void))((ulong)cleancache|0xA0000000))(); + configreg = ((int(*)(void))((ulong)cleancache|0xA0000000))(); memset(m, 0, sizeof(Mach)); @@ -414,6 +416,11 @@ exit(int type) USED(type); + lock(&active); + active.machs &= ~(1<machno); + active.exiting = 1; + unlock(&active); + spllo(); print("cpu%d exiting\n", m->machno); while(consactive()) diff --git a/carrera/mem.h b/carrera/mem.h index f3b3c42b7d978c27ca6aeb158b0d83fa0fb3e5fd..d62dd779103d07240cdf73164a9bcddf1a5a6335 100644 --- a/carrera/mem.h +++ b/carrera/mem.h @@ -22,7 +22,7 @@ /* * Time */ -#define HZ 100 /* clock frequency */ +#define HZ 1000 /* clock frequency */ #define MS2HZ (1000/HZ) /* millisec per clock tick */ #define TK2SEC(t) ((t)/HZ) /* ticks to seconds */ #define TK2MS(t) ((t)*MS2HZ) /* ticks to milliseconds */ diff --git a/port/devcons.c b/port/devcons.c index f9e43cf9c871b1effcec858eed19f98c1e15d75f..c7cacdc6e407a016c3db24f7ee5251005cb4713f 100644 --- a/port/devcons.c +++ b/port/devcons.c @@ -924,8 +924,10 @@ genrandom(void*) for(;;){ for(;;) - if(++rb.randomcount > 1000000) + if(++rb.randomcount > 100000) break; + if(anyhigher()) + sched(); if(!rbnotfull(0)) sleep(&rb.producer, rbnotfull, 0); }