4 files changed, 31 insertions(+), 11 deletions(-)

M pc/fns.h
M pc/i8253.c
M pc/sd53c8xx.c
M pc/vgas3.c

@@ 1,24 1,23 @@
 #include "../port/portfns.h"
 
-vlong	checkcycintr(Ureg*, void*);
-void	cycintradd(Cycintr*);
-void	cycintrdel(Cycintr*);
-void	clockintrsched(void);
-vlong	cycintrnext(void);
-
 void	aamloop(int);
 void	addconf(char*, char*);
 //void	addscsilink(char*, Scsiio (*)(int, ISAConf*));
 void	archinit(void);
 void	bootargs(ulong);
+vlong	checkcycintr(Ureg*, void*);
 int	cistrcmp(char*, char*);
 int	cistrncmp(char*, char*, int);
 #define	clearmmucache()				/* x86 doesn't have one */
 void	clockintr(Ureg*, void*);
+void	clockintrsched(void);
 void	(*coherence)(void);
 void	cpuid(char*, int*, int*);
 int	cpuidentify(void);
 void	cpuidprint(void);
+void	cycintradd(Cycintr*);
+void	cycintrdel(Cycintr*);
+vlong	cycintrnext(void);
 void	delay(int);
 int	dmacount(int);
 int	dmadone(int);


@@ 37,6 36,7 @@ ulong	getcr2(void);
 ulong	getcr3(void);
 ulong	getcr4(void);
 char*	getconf(char*);
+int	havecycintr(void);
 int	i8042auxcmd(int);
 void	i8042auxenable(void (*)(int, int));
 void	i8042reset(void);

@@ 53,6 53,7 @@ enum
 static struct
 {
 	Lock;
+	int	enabled;
 	int	mode;
 	vlong	when;		/* next fastticks a clock interrupt should occur */
 	vlong	cycwhen;	/* next fastticks a cycintr happens; 0 == infinity */


@@ 198,15 199,23 @@ clockintrsched0(vlong next)
 	}
 }
 
+int
+havecycintr(void)
+{
+	return i8253.enabled;
+}
+
 void
 clockintrsched(void)
 {
 	vlong next;
 
 	ilock(&i8253);
-	next = cycintrnext();
-	if(next != i8253.cycwhen)
-		clockintrsched0(next);
+	if(i8253.enabled){
+		next = cycintrnext();
+		if(next != i8253.cycwhen)
+			clockintrsched0(next);
+	}
 	iunlock(&i8253);
 }
 


@@ 233,6 242,7 @@ i8253enable(void)
 	i8253.when = fastticks(nil);
 	i8253.fastperiod = (m->cpuhz + HZ/2) / HZ;
 	i8253.fast2freq = (vlong)m->cpuhz * FreqMul / Freq;
+	i8253.enabled = 1;
 	intrenable(IrqCLOCK, clockintr0, 0, BUSUNKNOWN, "clock");
 }
 

@@ 1938,17 1938,23 @@ na_fixup(Controller *c, ulong pa_reg,
 static SDev*
 sympnp(void)
 {
-	int ba;
+	char *cp;
 	Pcidev *p;
 	Variant *v;
+	int ba, nctlr;
 	void *scriptma;
 	Controller *ctlr;
 	SDev *sdev, *head, *tail;
 	ulong regpa, *script, scriptpa;
 
+	if(cp = getconf("*maxsd53c8xx"))
+		nctlr = strtoul(cp, 0, 0);
+	else
+		nctlr = 32;
+
 	p = nil;
 	head = tail = nil;
-	while(p = pcimatch(p, NCR_VID, 0)){
+	while((p = pcimatch(p, NCR_VID, 0)) != nil && nctlr > 0){
 		for(v = variant; v < &variant[nelem(variant)]; v++){
 			if(p->did == v->did && p->rid <= v->maxrid)
 				break;


@@ 2045,6 2051,8 @@ buggery:
 		else
 			head = sdev;
 		tail = sdev;
+
+		nctlr--;
 	}
 
 	return head;

@@ 240,6 240,7 @@ s3load(VGAscr* scr, Cursor* curs)
 	case 0xE18A:				/* ViRGE/[DG]X */
 	case 0xE110:				/* ViRGE/GX2 */
 	case 0xE13D:				/* ViRGE/VX */
+	case 0xE112:				/* Savage4/MX */
 	case 0xE122:				/* Savage4 */
 		p += scr->storage;
 		break;


@@ 287,6 288,7 @@ s3load(VGAscr* scr, Cursor* curs)
 	case 0xE18A:				/* ViRGE/[DG]X */
 	case 0xE110:				/* ViRGE/GX2 */
 	case 0xE13D:				/* ViRGE/VX */
+	case 0xE112:				/* Savage4/MX */
 	case 0xE122:				/* Savage4 */
 		break;