M bitsy/clock.c => bitsy/clock.c +57 -7
@@ 7,6 7,25 @@
#include "ureg.h"
#include "../port/error.h"
+typedef struct OSTimer
+{
+ ulong osmr[4]; /* match registers */
+ ulong oscr; /* counter register */
+ ulong ossr; /* status register */
+ ulong ower; /* watchdog enable register */
+ ulong oier; /* timer interrupt enable register */
+} OSTimer;
+
+static OSTimer *timerregs = (OSTimer*)OSTIMERREGS;
+
+enum
+{
+ /* hardware counter frequency */
+ ClockFreq= 3686400,
+};
+
+static void clockintr(Ureg*, void*);
+
typedef struct Clock0link Clock0link;
typedef struct Clock0link {
void (*clock)(void);
@@ 32,24 51,55 @@ addclock0link(void (*clock)(void))
iunlock(&clock0lock);
}
+void
+clockinit(void)
+{
+ /* map the clock registers */
+ timerregs = mapspecial(OSTIMERREGS, 32);
+
+ /* enable interrupts on match register 0, turn off all others */
+ timerregs->oier = 1<<0;
+ intrenable(IRQtimer0, clockintr, nil, "clock");
+
+ /* post interrupt 1/HZ secs from now */
+ timerregs->osmr[0] = timerregs->oscr + ClockFreq/HZ;
+}
vlong
fastticks(uvlong *hz)
{
- USED(hz);
-
- return m->ticks;
+ if(hz != nil)
+ *hz = ClockFreq;
+ return timerregs->oscr;
}
-void
+static void
clockintr(Ureg*, void*)
{
+ /* reset previous interrupt */
+ timerregs->ossr |= 1<<0;
+
+ /* post interrupt 1/HZ secs from now */
+ timerregs->osmr[0] = timerregs->oscr + ClockFreq/HZ;
+ iprint("timer interrupt\n");
+
+ m->ticks++;
+ if(m->ticks >= 100)
+ exit(0);
}
void
delay(int ms)
{
- ms *= 1000;
- while(ms-->0)
- ;
+ ulong cnt, old;
+
+ while(ms-- > 0){
+ cnt = ClockFreq/1000;
+ while(cnt-- > 0){
+ old = timerregs->oscr;
+ while(old == timerregs->oscr)
+ ;
+ }
+ }
+
}
M bitsy/devuart.c => bitsy/devuart.c +23 -3
@@ 137,12 137,13 @@ static void uartflow(void *v);
static void uartkick0(void *v);
static void uartkick(void *v);
static void uartrts(Uart *p, int on);
+static void uartintr(Ureg*, void*);
/*
* define a Uart.
*/
static void
-uartsetup(Uartregs *regs, ulong freq, char *name)
+uartsetup0(Uartregs *regs, ulong freq, char *name)
{
Uart *p;
@@ 182,6 183,17 @@ uartsetup(Uartregs *regs, ulong freq, char *name)
}
/*
+ * setup all uarts (called early by main() to allow debugging output to
+ * a serial port)
+ */
+void
+uartsetup(void)
+{
+ uart3regs = mapspecial(UART3REGS, 64);
+ uartsetup0(uart3regs, 36864000, "serialport3");
+}
+
+/*
* enable a port's interrupts. set DTR and RTS
*/
static void
@@ 189,6 201,7 @@ uartenable(Uart *p)
{
p->sticky[3] |= Rintena|Tintena;
p->regs->ctl[3] = p->sticky[3];
+ intrenable(IRQuart3, uartintr, p, p->name);
}
/*
@@ 253,7 266,6 @@ uartreset(void)
dp->perm = 0444;
dp++;
}
-
}
@@ 545,7 557,7 @@ uartsetbaud(Uart *p, int rate)
* turn on/off rts
*/
static void
-uartrts(Uart *p, int on)
+uartrts(Uart*, int)
{
}
@@ 605,6 617,14 @@ uartkick(void *v)
iunlock(&p->tlock);
}
+static void
+uartintr(Ureg*, void *x)
+{
+ Uart *p;
+
+ p = x;
+}
+
void
serialputs(char *str, int n)
{
M bitsy/fns.h => bitsy/fns.h +3 -2
@@ 3,8 3,7 @@
int cistrcmp(char*, char*);
int cistrncmp(char*, char*, int);
#define clearmmucache() /* x86 doesn't have one */
-void clockintr(Ureg*, void*);
-void clockintrsched(void);
+void clockinit(void);
#define coherence()
void delay(int);
void evenaddr(ulong);
@@ 14,6 13,7 @@ ulong getfsr(void);
#define getpgcolor(a) 0
void idle(void);
#define idlehands() /* nothing to do in the runproc */
+void intrenable(int, void (*)(Ureg*, void*), void*, char*);
int iprint(char*, ...);
void* mapspecial(ulong, int);
void meminit(void);
@@ 35,6 35,7 @@ void (*screenputs)(char*, int);
void touser(void*);
void trapinit(void);
int tas(void*);
+void uartsetup(void);
void wbflush(void);
#define waserror() (up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
M bitsy/main.c => bitsy/main.c +9 -1
@@ 22,11 22,19 @@ main(void)
iprint("%d pages %lux(%lud) %lux(%lud)\n", conf.npage, conf.base0, conf.npage0, conf.base1, conf.npage1);
xinit();
iprint("after xinit\n");
+ iprint("testing 2 second delay\n");
+ delay(2000);
+ iprint("done\n");
mmuinit();
+ uartsetup();
iprint("after mmuinit\n");
+ clockinit();
+ iprint("after clockinit\n");
trapinit();
iprint("after trapinit\n");
- delay(100000);
+ spllo();
+ iprint("after spllo\n");
+ delay(1000000);
exit(1);
}
M bitsy/mem.h => bitsy/mem.h +2 -1
@@ 21,7 21,7 @@
/*
* Time
*/
-#define HZ (100) /* clock frequency */
+#define HZ (10) /* clock frequency */
#define MS2HZ (1000/HZ) /* millisec per clock tick */
#define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
#define TK2MS(t) ((((ulong)(t))*1000)/HZ) /* ticks to milliseconds */
@@ 92,6 92,7 @@
#define PPCREGS 0x90060000 /* peripheral pin controller */
#define GPIOREGS 0x90040000 /* 28 general purpose IO pins */
#define INTRREGS 0x90050000 /* interrupt registers */
+#define OSTIMERREGS 0x90000000 /* operating system timer registers */
/*
* Program Status Registers
M bitsy/mmu.c => bitsy/mmu.c +0 -5
@@ 97,13 97,8 @@ mmuinit(void)
iprint("setting tlb map %lux\n", (ulong)l1table);
putttb((ulong)l1table);
- /* map the uart so that we can continue using iprint */
- uart3regs = mapspecial(UART3REGS, 64);
-
/* enable mmu, and make 0xFFFF0000 the virtual address of the exception vecs */
mmuenable();
-
- iprint("uart3regs now at %lux\n", uart3regs);
}
/*
M bitsy/trap.c => bitsy/trap.c +11 -0
@@ 87,6 87,11 @@ intrenable(int irq, void (*f)(Ureg*, void*), void* a, char *name)
void
trap(Ureg *ureg)
{
+ int i;
+ Vctl *v;
+
+ iprint("trap %lux pc %lux psr %lux\n", ureg->type, ureg->pc, ureg->psr);
+
switch(ureg->type){
default:
panic("unknown trap");
@@ 98,6 103,12 @@ trap(Ureg *ureg)
panic("undefined instruction");
break;
case PsrMirq: /* device interrupt */
+ for(i = 0; i < 32; i++)
+ if((1<<i) & intrregs->icip){
+ iprint("irq: %d\n", i);
+ for(v = vctl[i]; v != nil; v = v->next)
+ v->f(ureg, v->a);
+ }
break;
}
}
M pc/devi82365.c => pc/devi82365.c +7 -15
@@ 260,20 260,13 @@ slotena(Slot *pp)
if(pp->enabled)
return;
-print("-enabling<");
/* power up and unreset, wait's are empirical (???) */
wrreg(pp, Rpc, Fautopower|Foutena|Fcardena);
-print(">");
delay(300);
-print("<");
wrreg(pp, Rigc, 0);
-print(">");
delay(100);
-print("<");
wrreg(pp, Rigc, Fnotreset);
-print(">");
delay(500);
-print("...");
/* get configuration */
slotinfo(pp);
@@ 282,7 275,6 @@ print("...");
pp->enabled = 1;
} else
wrreg(pp, Rpc, Fautopower);
-print("done-");
}
/*
@@ 446,26 438,27 @@ pcmspecial(char *idstr, ISAConf *isa)
{
Slot *pp;
extern char *strstr(char*, char*);
+ static int resetdone;
- i82365reset();
-print("Looking for %s ...", idstr);
+ if (! resetdone) {
+ i82365reset();
+ resetdone++;
+ }
for(pp = slot; pp < lastslot; pp++){
if(pp->special)
continue; /* already taken */
increfp(pp);
if(pp->occupied) {
-print("[%s] ", pp->verstr);
if(strstr(pp->verstr, idstr))
if(isa == 0 || pcmio(pp->slotno, isa) == 0){
pp->special = 1;
-print("done\n");
return pp->slotno;
}
- }
+ } else
+ pp->special = 1;
decrefp(pp);
}
-print("not found\n");
return -1;
}
@@ 620,7 613,6 @@ i82365probe(int x, int d, int dev)
if(nslot > 0 && nslot <= 2)
cp->nslot = nslot;
}
-print("%uX/%d: nslot = %d\n", x, dev, cp->nslot);
controller[ncontroller++] = cp;
return cp;
M pc/mouse.c => pc/mouse.c +4 -0
@@ 101,6 101,10 @@ ps2mouse(void)
mousetype = MousePS2;
}
+static int intellimouse;
+static int resolution;
+static int accelerated;
+
static void
setaccelerated(int x)
{
M pc/pcmciamodem.c => pc/pcmciamodem.c +16 -17
@@ 31,10 31,11 @@ void
pcmciamodemlink(void)
{
ISAConf isa;
- int i, j, slot;
+ int i, j, slot, com2used;
i = 0;
- for(;;){
+ com2used = 0;
+ for(j = 0; modems[j]; j++){
memset(&isa, 0, sizeof(isa));
/* look for a configuration line */
@@ 45,22 46,20 @@ pcmciamodemlink(void)
memset(&isa, 0, sizeof(isa));
}
- /* default is COM2 */
- if(isa.irq == 0)
- isa.irq = 3;
- if(isa.port == 0)
- isa.port = 0x2F8;
-
- slot = -1;
- for(j = 0; modems[j]; j++){
- slot = pcmspecial(modems[j], &isa);
- if(slot >= 0){
- print("%s in pcmcia slot %d port 0x%lux irq %lud\n",
- modems[j], slot, isa.port, isa.irq);
+ if (isa.irq == 0 && isa.port == 0) {
+ if (com2used == 0) {
+ /* default is COM2 */
+ isa.irq = 3;
+ isa.port = 0x2F8;
+ com2used++;
+ } else
break;
- }
}
- if(slot < 0)
- break;
+
+ slot = pcmspecial(modems[j], &isa);
+ if(slot >= 0){
+ print("%s in pcmcia slot %d port 0x%lux irq %lud\n",
+ modems[j], slot, isa.port, isa.irq);
+ }
}
}