From 31adbde16d709e57bbf374d5c8a594f82a161fa4 Mon Sep 17 00:00:00 2001 From: David du Colombier <0intro@gmail.com> Date: Fri, 6 Oct 2000 00:00:00 +0000 Subject: [PATCH] Plan 9 from Bell Labs 2000-10-06 --- bitsy/clock.c | 64 ++++++++++++++++++++++++++++++++++++++++++------ bitsy/devuart.c | 26 +++++++++++++++++--- bitsy/fns.h | 5 ++-- bitsy/main.c | 10 +++++++- bitsy/mem.h | 3 ++- bitsy/mmu.c | 5 ---- bitsy/trap.c | 11 +++++++++ pc/devi82365.c | 22 ++++++----------- pc/mouse.c | 4 +++ pc/pcmciamodem.c | 33 ++++++++++++------------- 10 files changed, 132 insertions(+), 51 deletions(-) diff --git a/bitsy/clock.c b/bitsy/clock.c index 7c6942cac21f673a0a87010a4766403635951217..c84b8f6b26e2d5d7387a55002f0eabab5579eb25 100644 --- a/bitsy/clock.c +++ b/bitsy/clock.c @@ -7,6 +7,25 @@ #include "ureg.h" #include "../port/error.h" +typedef struct OSTimer +{ + ulong osmr[4]; /* match registers */ + ulong oscr; /* counter register */ + ulong ossr; /* status register */ + ulong ower; /* watchdog enable register */ + ulong oier; /* timer interrupt enable register */ +} OSTimer; + +static OSTimer *timerregs = (OSTimer*)OSTIMERREGS; + +enum +{ + /* hardware counter frequency */ + ClockFreq= 3686400, +}; + +static void clockintr(Ureg*, void*); + typedef struct Clock0link Clock0link; typedef struct Clock0link { void (*clock)(void); @@ -32,24 +51,55 @@ addclock0link(void (*clock)(void)) iunlock(&clock0lock); } +void +clockinit(void) +{ + /* map the clock registers */ + timerregs = mapspecial(OSTIMERREGS, 32); + + /* enable interrupts on match register 0, turn off all others */ + timerregs->oier = 1<<0; + intrenable(IRQtimer0, clockintr, nil, "clock"); + + /* post interrupt 1/HZ secs from now */ + timerregs->osmr[0] = timerregs->oscr + ClockFreq/HZ; +} vlong fastticks(uvlong *hz) { - USED(hz); - - return m->ticks; + if(hz != nil) + *hz = ClockFreq; + return timerregs->oscr; } -void +static void clockintr(Ureg*, void*) { + /* reset previous interrupt */ + timerregs->ossr |= 1<<0; + + /* post interrupt 1/HZ secs from now */ + timerregs->osmr[0] = timerregs->oscr + ClockFreq/HZ; + iprint("timer interrupt\n"); + + m->ticks++; + if(m->ticks >= 100) + exit(0); } void delay(int ms) { - ms *= 1000; - while(ms-->0) - ; + ulong cnt, old; + + while(ms-- > 0){ + cnt = ClockFreq/1000; + while(cnt-- > 0){ + old = timerregs->oscr; + while(old == timerregs->oscr) + ; + } + } + } diff --git a/bitsy/devuart.c b/bitsy/devuart.c index 5585bfeca3c19dad807d845124493ceea6ec87f3..b353ec96dc922b5ef33d4ba5a8a9315f0f3bee00 100644 --- a/bitsy/devuart.c +++ b/bitsy/devuart.c @@ -137,12 +137,13 @@ static void uartflow(void *v); static void uartkick0(void *v); static void uartkick(void *v); static void uartrts(Uart *p, int on); +static void uartintr(Ureg*, void*); /* * define a Uart. */ static void -uartsetup(Uartregs *regs, ulong freq, char *name) +uartsetup0(Uartregs *regs, ulong freq, char *name) { Uart *p; @@ -181,6 +182,17 @@ uartsetup(Uartregs *regs, ulong freq, char *name) p->oe = p->ostage; } +/* + * setup all uarts (called early by main() to allow debugging output to + * a serial port) + */ +void +uartsetup(void) +{ + uart3regs = mapspecial(UART3REGS, 64); + uartsetup0(uart3regs, 36864000, "serialport3"); +} + /* * enable a port's interrupts. set DTR and RTS */ @@ -189,6 +201,7 @@ uartenable(Uart *p) { p->sticky[3] |= Rintena|Tintena; p->regs->ctl[3] = p->sticky[3]; + intrenable(IRQuart3, uartintr, p, p->name); } /* @@ -253,7 +266,6 @@ uartreset(void) dp->perm = 0444; dp++; } - } @@ -545,7 +557,7 @@ uartsetbaud(Uart *p, int rate) * turn on/off rts */ static void -uartrts(Uart *p, int on) +uartrts(Uart*, int) { } @@ -605,6 +617,14 @@ uartkick(void *v) iunlock(&p->tlock); } +static void +uartintr(Ureg*, void *x) +{ + Uart *p; + + p = x; +} + void serialputs(char *str, int n) { diff --git a/bitsy/fns.h b/bitsy/fns.h index 3de57fa6374519b1d97595aacd23a637dfa25619..99e1a2e317d047b8c4f537a2bac8a57e3431f780 100644 --- a/bitsy/fns.h +++ b/bitsy/fns.h @@ -3,8 +3,7 @@ int cistrcmp(char*, char*); int cistrncmp(char*, char*, int); #define clearmmucache() /* x86 doesn't have one */ -void clockintr(Ureg*, void*); -void clockintrsched(void); +void clockinit(void); #define coherence() void delay(int); void evenaddr(ulong); @@ -14,6 +13,7 @@ ulong getfsr(void); #define getpgcolor(a) 0 void idle(void); #define idlehands() /* nothing to do in the runproc */ +void intrenable(int, void (*)(Ureg*, void*), void*, char*); int iprint(char*, ...); void* mapspecial(ulong, int); void meminit(void); @@ -35,6 +35,7 @@ void (*screenputs)(char*, int); void touser(void*); void trapinit(void); int tas(void*); +void uartsetup(void); void wbflush(void); #define waserror() (up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1])) diff --git a/bitsy/main.c b/bitsy/main.c index 59e0035db5d3d6d0bbc8a5af013021600dcf9ddb..c0f235eda05095293de91b5155710a5c458be778 100644 --- a/bitsy/main.c +++ b/bitsy/main.c @@ -22,11 +22,19 @@ main(void) iprint("%d pages %lux(%lud) %lux(%lud)\n", conf.npage, conf.base0, conf.npage0, conf.base1, conf.npage1); xinit(); iprint("after xinit\n"); + iprint("testing 2 second delay\n"); + delay(2000); + iprint("done\n"); mmuinit(); + uartsetup(); iprint("after mmuinit\n"); + clockinit(); + iprint("after clockinit\n"); trapinit(); iprint("after trapinit\n"); - delay(100000); + spllo(); + iprint("after spllo\n"); + delay(1000000); exit(1); } diff --git a/bitsy/mem.h b/bitsy/mem.h index 169a4a762aff1d61370914ce8a8075bdaf8fa065..a61aa7760e69c710c9fd3997e2832875775ecd76 100644 --- a/bitsy/mem.h +++ b/bitsy/mem.h @@ -21,7 +21,7 @@ /* * Time */ -#define HZ (100) /* clock frequency */ +#define HZ (10) /* clock frequency */ #define MS2HZ (1000/HZ) /* millisec per clock tick */ #define TK2SEC(t) ((t)/HZ) /* ticks to seconds */ #define TK2MS(t) ((((ulong)(t))*1000)/HZ) /* ticks to milliseconds */ @@ -92,6 +92,7 @@ #define PPCREGS 0x90060000 /* peripheral pin controller */ #define GPIOREGS 0x90040000 /* 28 general purpose IO pins */ #define INTRREGS 0x90050000 /* interrupt registers */ +#define OSTIMERREGS 0x90000000 /* operating system timer registers */ /* * Program Status Registers diff --git a/bitsy/mmu.c b/bitsy/mmu.c index 53970f0d9388f2fd9f127d8e2f3621adb667bddd..7ebc84513f19844fd8c85afc0d55099a1af46b1b 100644 --- a/bitsy/mmu.c +++ b/bitsy/mmu.c @@ -97,13 +97,8 @@ mmuinit(void) iprint("setting tlb map %lux\n", (ulong)l1table); putttb((ulong)l1table); - /* map the uart so that we can continue using iprint */ - uart3regs = mapspecial(UART3REGS, 64); - /* enable mmu, and make 0xFFFF0000 the virtual address of the exception vecs */ mmuenable(); - - iprint("uart3regs now at %lux\n", uart3regs); } /* diff --git a/bitsy/trap.c b/bitsy/trap.c index e314dd96765e99bacd2dbba6a57626d5858ac0a5..58c983b9e289861615ed46adc10191eb30939897 100644 --- a/bitsy/trap.c +++ b/bitsy/trap.c @@ -87,6 +87,11 @@ intrenable(int irq, void (*f)(Ureg*, void*), void* a, char *name) void trap(Ureg *ureg) { + int i; + Vctl *v; + + iprint("trap %lux pc %lux psr %lux\n", ureg->type, ureg->pc, ureg->psr); + switch(ureg->type){ default: panic("unknown trap"); @@ -98,6 +103,12 @@ trap(Ureg *ureg) panic("undefined instruction"); break; case PsrMirq: /* device interrupt */ + for(i = 0; i < 32; i++) + if((1<icip){ + iprint("irq: %d\n", i); + for(v = vctl[i]; v != nil; v = v->next) + v->f(ureg, v->a); + } break; } } diff --git a/pc/devi82365.c b/pc/devi82365.c index f84e17b19edd0fabc4f334a7bd6a3a6f637642fc..da3463701f31aa5e5a5845c239ad84edd50e0f7d 100644 --- a/pc/devi82365.c +++ b/pc/devi82365.c @@ -260,20 +260,13 @@ slotena(Slot *pp) if(pp->enabled) return; -print("-enabling<"); /* power up and unreset, wait's are empirical (???) */ wrreg(pp, Rpc, Fautopower|Foutena|Fcardena); -print(">"); delay(300); -print("<"); wrreg(pp, Rigc, 0); -print(">"); delay(100); -print("<"); wrreg(pp, Rigc, Fnotreset); -print(">"); delay(500); -print("..."); /* get configuration */ slotinfo(pp); @@ -282,7 +275,6 @@ print("..."); pp->enabled = 1; } else wrreg(pp, Rpc, Fautopower); -print("done-"); } /* @@ -446,26 +438,27 @@ pcmspecial(char *idstr, ISAConf *isa) { Slot *pp; extern char *strstr(char*, char*); + static int resetdone; - i82365reset(); -print("Looking for %s ...", idstr); + if (! resetdone) { + i82365reset(); + resetdone++; + } for(pp = slot; pp < lastslot; pp++){ if(pp->special) continue; /* already taken */ increfp(pp); if(pp->occupied) { -print("[%s] ", pp->verstr); if(strstr(pp->verstr, idstr)) if(isa == 0 || pcmio(pp->slotno, isa) == 0){ pp->special = 1; -print("done\n"); return pp->slotno; } - } + } else + pp->special = 1; decrefp(pp); } -print("not found\n"); return -1; } @@ -620,7 +613,6 @@ i82365probe(int x, int d, int dev) if(nslot > 0 && nslot <= 2) cp->nslot = nslot; } -print("%uX/%d: nslot = %d\n", x, dev, cp->nslot); controller[ncontroller++] = cp; return cp; diff --git a/pc/mouse.c b/pc/mouse.c index e895cbfcbc41f5a9c62c4861d9aa2c0abeb20214..bcc1a8ec74c9470057ba0142bcc245c5984b0d08 100644 --- a/pc/mouse.c +++ b/pc/mouse.c @@ -101,6 +101,10 @@ ps2mouse(void) mousetype = MousePS2; } +static int intellimouse; +static int resolution; +static int accelerated; + static void setaccelerated(int x) { diff --git a/pc/pcmciamodem.c b/pc/pcmciamodem.c index baaac15650f8d47c6c913c235848d2f2253b2e78..26c654b4b83aba3e2ba63000e59f68edf3fe3000 100644 --- a/pc/pcmciamodem.c +++ b/pc/pcmciamodem.c @@ -31,10 +31,11 @@ void pcmciamodemlink(void) { ISAConf isa; - int i, j, slot; + int i, j, slot, com2used; i = 0; - for(;;){ + com2used = 0; + for(j = 0; modems[j]; j++){ memset(&isa, 0, sizeof(isa)); /* look for a configuration line */ @@ -45,22 +46,20 @@ pcmciamodemlink(void) memset(&isa, 0, sizeof(isa)); } - /* default is COM2 */ - if(isa.irq == 0) - isa.irq = 3; - if(isa.port == 0) - isa.port = 0x2F8; - - slot = -1; - for(j = 0; modems[j]; j++){ - slot = pcmspecial(modems[j], &isa); - if(slot >= 0){ - print("%s in pcmcia slot %d port 0x%lux irq %lud\n", - modems[j], slot, isa.port, isa.irq); + if (isa.irq == 0 && isa.port == 0) { + if (com2used == 0) { + /* default is COM2 */ + isa.irq = 3; + isa.port = 0x2F8; + com2used++; + } else break; - } } - if(slot < 0) - break; + + slot = pcmspecial(modems[j], &isa); + if(slot >= 0){ + print("%s in pcmcia slot %d port 0x%lux irq %lud\n", + modems[j], slot, isa.port, isa.irq); + } } }