M carrera/l.s => carrera/l.s +12 -0
@@ 310,6 310,18 @@ TEXT vector0(SB), $-4
TEXT utlbmiss(SB), $-4
+ CONST ((0xA0090000), R27)
+ MOVW M(EPC), R26
+ MOVW R26, 0(R27)
+ MOVW M(BADVADDR), R26
+ MOVW R26, 4(R27)
+ MOVW M(CAUSE), R26
+ MOVW R26, 8(R27)
+ MOVW M(TLBVIRT), R26
+ MOVW R26, 12(R27)
+ MOVW M(17), R26
+ MOVW R26, 16(R27)
+
MOVW M(TLBVIRT), R27
WAIT
MOVW R27, R26
M carrera/main.c => carrera/main.c +2 -0
@@ 6,6 6,8 @@
#include "io.h"
#include "init.h"
+int junk[32];
+
/*
* args passed by boot process
*/
M carrera/mem.h => carrera/mem.h +1 -1
@@ 95,7 95,7 @@
/*
* Fundamental addresses
*/
-#define MACHADDR 0x80005000 /* Mach structures */
+#define MACHADDR 0x8008e000 /* Mach structures */
#define UREGSIZE 0xA0 /* Sizeof(Ureg)+retpc & ur */
#define MACHP(n) ((Mach *)(MACHADDR+(n)*BY2PG))
M carrera/mmu.c => carrera/mmu.c +21 -0
@@ 6,6 6,8 @@
#include "io.h"
#include "ureg.h"
+Mach machstruct[100];
+
/*
* tlb entry 0 is used only by mmuswitch() to set the current tlb pid.
*/
@@ 291,11 293,30 @@ putmmu(ulong tlbvirt, ulong tlbphys, Page *pg)
puttlb(entry->virt, entry->phys0, entry->phys1);
ctl = &pg->cachectl[m->machno];
+((ulong*)0xA0090000)[8] = 0x1000;
+((ulong*)0xA0090000)[5] = tlbvirt;
if(*ctl == PG_TXTFLUSH) {
+ulong tlb[4];
+extern int gettlbp(ulong, ulong*);
+extern ulong tlbvirt(void);
+((ulong*)0xA0090000)[6] = tlbphys;
+((ulong*)0xA0090000)[7] = pg->va;
+((ulong*)0xA0090000)[8] = 0x2000;
+ if(gettlbp((pg->va & ~BY2PG)|TLBPID(tlbvirt()), tlb) < 0){
+ print("entry->virt %lux pg->va %lux\n", entry->virt, pg->va);
+ panic("icflush not in TLB");
+ }
+if(pg->va == 0x19000) {
+print("xx>> virt %lux phys0 %lux phys1 %lux\n", tlb[0],tlb[1],tlb[2]);
+}
icflush((void*)pg->va, BY2PG);
+((ulong*)0xA0090000)[8] = 0x3000;
*ctl = PG_NOFLUSH;
+((ulong*)0xA0090000)[8] = 0x4000;
}
+((ulong*)0xA0090000)[8] = 0x5000;
splx(s);
+((ulong*)0xA0090000)[8] = 0x6000;
}
void
M carrera/trap.c => carrera/trap.c +7 -0
@@ 201,6 201,13 @@ trap(Ureg *ur)
case CTLBM:
case CTLBL:
case CTLBS:
+{
+((ulong*)0xA0090000)[0] = ur->pc;
+((ulong*)0xA0090000)[1] = ur->badvaddr;
+((ulong*)0xA0090000)[2] = ur->cause;
+((ulong*)0xA0090000)[3] = 0x12345678;
+((ulong*)0xA0090000)[4] = 0x87654321;
+}
if(up == 0)
kernfault(ur, ecode);