From 295082996c1cec927956285c7a8f0fc9abb178a4 Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Thu, 9 Dec 1993 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 1993-12-09

---
 carrera/l.s    | 12 ++++++++++++
 carrera/main.c |  2 ++
 carrera/mem.h  |  2 +-
 carrera/mmu.c  | 21 +++++++++++++++++++++
 carrera/trap.c |  7 +++++++
 5 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/carrera/l.s b/carrera/l.s
index e5821c7a9a343726ea5f10ad3ed5a44249f8427e..04675a9f373a83e1b39b177c0702b62734984df6 100644
--- a/carrera/l.s
+++ b/carrera/l.s
@@ -310,6 +310,18 @@ TEXT	vector0(SB), $-4
 
 TEXT	utlbmiss(SB), $-4
 
+	CONST	((0xA0090000), R27)
+	MOVW	M(EPC), R26
+	MOVW	R26, 0(R27)
+	MOVW	M(BADVADDR), R26
+	MOVW	R26, 4(R27)
+	MOVW	M(CAUSE), R26
+	MOVW	R26, 8(R27)
+	MOVW	M(TLBVIRT), R26
+	MOVW	R26, 12(R27)
+	MOVW	M(17), R26
+	MOVW	R26, 16(R27)
+
 	MOVW	M(TLBVIRT), R27
 	WAIT
 	MOVW	R27, R26
diff --git a/carrera/main.c b/carrera/main.c
index 81959312aee5236503e3335e55e61444251130fa..32f29c7d1fd15b96073b5590c99eefc20b5cdb42 100644
--- a/carrera/main.c
+++ b/carrera/main.c
@@ -6,6 +6,8 @@
 #include	"io.h"
 #include	"init.h"
 
+int	junk[32];
+
 /*
  *  args passed by boot process
  */
diff --git a/carrera/mem.h b/carrera/mem.h
index 53db6f31d5577a37e4913f9f43c446a5dad6d992..741023b528a81437020bcbb44dca01045e627259 100644
--- a/carrera/mem.h
+++ b/carrera/mem.h
@@ -95,7 +95,7 @@
 /*
  * Fundamental addresses
  */
-#define	MACHADDR	0x80005000	/* Mach structures */
+#define	MACHADDR	0x8008e000	/* Mach structures */
 #define UREGSIZE	0xA0		/* Sizeof(Ureg)+retpc & ur */
 #define	MACHP(n)	((Mach *)(MACHADDR+(n)*BY2PG))
 
diff --git a/carrera/mmu.c b/carrera/mmu.c
index 3c94f5a6508a38fe09f0fccd3d7e49bdc04b9d83..6a88b288fde9328ce44559626bf09643c7f6d865 100644
--- a/carrera/mmu.c
+++ b/carrera/mmu.c
@@ -6,6 +6,8 @@
 #include	"io.h"
 #include	"ureg.h"
 
+Mach	machstruct[100];
+
 /*
  *  tlb entry 0 is used only by mmuswitch() to set the current tlb pid.
  */
@@ -291,11 +293,30 @@ putmmu(ulong tlbvirt, ulong tlbphys, Page *pg)
 	puttlb(entry->virt, entry->phys0, entry->phys1);
 
 	ctl = &pg->cachectl[m->machno];
+((ulong*)0xA0090000)[8] = 0x1000;
+((ulong*)0xA0090000)[5] = tlbvirt;
 	if(*ctl == PG_TXTFLUSH) {
+ulong tlb[4];
+extern int gettlbp(ulong, ulong*);
+extern ulong tlbvirt(void);
+((ulong*)0xA0090000)[6] = tlbphys;
+((ulong*)0xA0090000)[7] = pg->va;
+((ulong*)0xA0090000)[8] = 0x2000;
+		if(gettlbp((pg->va & ~BY2PG)|TLBPID(tlbvirt()), tlb) < 0){
+			print("entry->virt %lux pg->va %lux\n", entry->virt, pg->va);
+			panic("icflush not in TLB");
+		}
+if(pg->va == 0x19000) {
+print("xx>> virt %lux phys0 %lux phys1 %lux\n", tlb[0],tlb[1],tlb[2]);
+}
 		icflush((void*)pg->va, BY2PG);
+((ulong*)0xA0090000)[8] = 0x3000;
 		*ctl = PG_NOFLUSH;
+((ulong*)0xA0090000)[8] = 0x4000;
 	}
+((ulong*)0xA0090000)[8] = 0x5000;
 	splx(s);
+((ulong*)0xA0090000)[8] = 0x6000;
 }
 
 void
diff --git a/carrera/trap.c b/carrera/trap.c
index 84250fb056d2da4dbffd3225166ea8bd9d2d2431..4f780ae4cc2b5bbc30b2e1bb2912967ad13c1fd9 100644
--- a/carrera/trap.c
+++ b/carrera/trap.c
@@ -201,6 +201,13 @@ trap(Ureg *ur)
 	case CTLBM:
 	case CTLBL:
 	case CTLBS:
+{
+((ulong*)0xA0090000)[0] = ur->pc;
+((ulong*)0xA0090000)[1] = ur->badvaddr;
+((ulong*)0xA0090000)[2] = ur->cause;
+((ulong*)0xA0090000)[3] = 0x12345678;
+((ulong*)0xA0090000)[4] = 0x87654321;
+}
 		if(up == 0)
 			kernfault(ur, ecode);