M port/devbit.c => port/devbit.c +18 -0
@@ 945,6 945,24 @@ bitwrite(Chan *c, void *va, long n)
m -= l;
}
break;
+
+ case 'x':
+ /*
+ * cursorset
+ *
+ * 'x' 1
+ * pt 8
+ */
+ if(m < 9)
+ error(0, Ebadblt);
+ pt1.x = GLONG(p+1);
+ pt1.y = GLONG(p+5);
+ mouse.xy = pt1;
+ mouse.track = 1;
+ mouseclock();
+ m -= 9;
+ p += 9;
+ break;
}
if(isoff)
M port/devlance.c => port/devlance.c +6 -0
@@ 888,3 888,9 @@ lanceparity(void)
MODEREG->promenet &= ~4;
MODEREG->promenet |= 4;
}
+
+void
+lance3intr(void)
+{
+ panic("lance3 interrupt\n");
+}
M power/devhs.c => power/devhs.c +1 -0
@@ 488,6 488,7 @@ hsvmekproc(void *arg)
* 0xFFFF means an empty fifo
*/
while ((c = addr->data) != 0xFFFF) {
+ hp->in++;
miss = 0;
if(c & CHNO){
c &= 0x1FF;
M power/fns.h => power/fns.h +3 -1
@@ 77,10 77,12 @@ void icflush(void *, int);
int incref(Ref*);
void insert(List**, List*, List*);
void intr(ulong, ulong);
-void io2init(void);
+void ioboardid(void);
+void ioboardinit(void);
void isdir(Chan*);
void kbdchar(int);
void kproc(char*, void(*)(void*), void*);
+void lance3intr(void);
void launchinit(void);
void lancereset(void);
void lanceinit(void);
M power/io.h => power/io.h +4 -0
@@ 83,3 83,7 @@ struct INTVEC {
#define MPBERR1 IO2(ulong, 0xF4C000)
#define SBEADDR ((ulong *)(UNCACHED|0x1F080000))
+/*
+ * IO board type
+ */
+extern int ioid;
M power/main.c => power/main.c +29 -2
@@ 34,6 34,11 @@ char confbuf[4*1024];
*/
char sysname[64];
+/*
+ * IO board type
+ */
+int ioid;
+
void
main(void)
{
@@ 53,12 58,13 @@ main(void)
chaninit();
clockinit();
alarminit();
- io2init();
+ ioboardinit();
chandevreset();
streaminit();
sysloginit();
pageinit();
userinit();
+ ioboardid();
launchinit();
schedinit();
}
@@ 100,15 106,36 @@ vecinit(void)
*p++ = *q++;
}
+void
+ioboardid(void)
+{
+ switch(ioid){
+ case IO2R1:
+ print("IO2 revision 1\n");
+ break;
+ case IO2R2:
+ print("IO2 revision 2\n");
+ break;
+ case IO3R1:
+ print("IO3 revision 1\n");
+ break;
+ default:
+ print("unknown IO board\n");
+ break;
+ }
+}
+
/*
* We have to program both the IO2 board to generate interrupts
* and the SBCC on CPU 0 to accept them.
*/
void
-io2init(void)
+ioboardinit(void)
{
long i;
+ ioid = *IOID;
+
/*
* reset VME bus (MODEREG is on the IO2)
*/
M power/trap.c => power/trap.c +22 -13
@@ 230,16 230,27 @@ intr(ulong cause, ulong pc)
loop:
if(pend & 1) {
v = INTVECREG->i[0].vec;
-/* a botch, bit 12 seems to always be on
- if(v & (1<<12))
+ if(!(v & (1<<12)))
print("io2 mp bus error %d\n", 0);
- */
- if(!(v & (1<<2)))
- lanceintr();
- if(!(v & (1<<1)))
- lanceparity();
- if(!(v & (1<<0)))
- print("SCSI interrupt\n");
+ switch(ioid){
+ case IO2R1:
+ case IO2R2:
+ if(!(v & (1<<2)))
+ lanceintr();
+ if(!(v & (1<<1)))
+ lanceparity();
+ if(!(v & (1<<0)))
+ print("SCSI interrupt\n");
+ break;
+ case IO3R1:
+ if(v & (1<<2))
+ lance3intr();
+ if(v & (1<<1))
+ print("SCSI 1 interrupt\n");
+ if(v & (1<<0))
+ print("SCSI 0 interrupt\n");
+ break;
+ }
}
/*
* 5b. process vme
@@ 249,10 260,8 @@ intr(ulong cause, ulong pc)
for(i=1; pend; i++) {
if(pend & 1) {
v = INTVECREG->i[i].vec;
-/* a botch, bit 12 seems to always be on
- if(v & (1<<12))
+ if(!(v & (1<<12)))
print("io2 mp bus error %d\n", i);
- */
v &= 0xff;
(*vmevec[v])(v);
}
@@ 392,7 401,7 @@ Syscall syssleep, sysstat, sysuserstr, syswait, syswrite, syswstat;
Syscall *systab[]={
[SYSR1] sysr1,
- [ACCESS] sysaccess,
+ [___ACCESS___] sysaccess,
[BIND] sysbind,
[CHDIR] syschdir,
[CLOSE] sysclose,