From 09ecccd3330cd0b816ba228b5f1617ceb7bc40e0 Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Sun, 26 Aug 1990 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 1990-08-26

---
 port/devbit.c   | 18 ++++++++++++++++++
 port/devlance.c |  6 ++++++
 power/devhs.c   |  1 +
 power/fns.h     |  4 +++-
 power/io.h      |  4 ++++
 power/main.c    | 31 +++++++++++++++++++++++++++++--
 power/trap.c    | 35 ++++++++++++++++++++++-------------
 7 files changed, 83 insertions(+), 16 deletions(-)

diff --git a/port/devbit.c b/port/devbit.c
index ba04b8c6884ae4223483d71ea3fe157b567a2e20..20a94049fe993c94913a066e0f5204f8ae39efc1 100644
--- a/port/devbit.c
+++ b/port/devbit.c
@@ -945,6 +945,24 @@ bitwrite(Chan *c, void *va, long n)
 				m -= l;
 			}
 			break;
+
+		case 'x':
+			/*
+			 * cursorset
+			 *
+			 *	'x'		1
+			 *	pt		8
+			 */
+			if(m < 9)
+				error(0, Ebadblt);
+			pt1.x = GLONG(p+1);
+			pt1.y = GLONG(p+5);
+			mouse.xy = pt1;
+			mouse.track = 1;
+			mouseclock();
+			m -= 9;
+			p += 9;
+			break;
 		}
 
 	if(isoff)
diff --git a/port/devlance.c b/port/devlance.c
index 16237308dd17798edf2d0bec492e1eb7582c16ee..c96f7c251a16e24b033d24c727176592be5be378 100644
--- a/port/devlance.c
+++ b/port/devlance.c
@@ -888,3 +888,9 @@ lanceparity(void)
 	MODEREG->promenet &= ~4;
 	MODEREG->promenet |= 4;
 }
+
+void
+lance3intr(void)
+{
+	panic("lance3 interrupt\n");
+}
diff --git a/power/devhs.c b/power/devhs.c
index 4a5ee9c5d2cab255a5d50f792c7525a0cc19ba69..8afdae8339da1d663cfcd8f1833a1dc8f43503c0 100644
--- a/power/devhs.c
+++ b/power/devhs.c
@@ -488,6 +488,7 @@ hsvmekproc(void *arg)
 		 *  0xFFFF means an empty fifo
 		 */
 		while ((c = addr->data) != 0xFFFF) {
+			hp->in++;
 			miss = 0;
 			if(c & CHNO){
 				c &= 0x1FF;
diff --git a/power/fns.h b/power/fns.h
index 1d4a84fc051fa80dbeaa2ad8110a1c70155f0d36..6680092c790cc4840f286fc59c48c3ea4456fa50 100644
--- a/power/fns.h
+++ b/power/fns.h
@@ -77,10 +77,12 @@ void	icflush(void *, int);
 int	incref(Ref*);
 void	insert(List**, List*, List*);
 void	intr(ulong, ulong);
-void	io2init(void);
+void	ioboardid(void);
+void	ioboardinit(void);
 void	isdir(Chan*);
 void	kbdchar(int);
 void	kproc(char*, void(*)(void*), void*);
+void	lance3intr(void);
 void	launchinit(void);
 void	lancereset(void);
 void	lanceinit(void);
diff --git a/power/io.h b/power/io.h
index d283bab4de0c5c8eccf29bea7c2c88f6bfe2fc1c..423068b3083f8651f88f835fb44d3132eb5082f6 100644
--- a/power/io.h
+++ b/power/io.h
@@ -83,3 +83,7 @@ struct INTVEC {
 #define	MPBERR1		IO2(ulong, 0xF4C000)
 #define SBEADDR		((ulong *)(UNCACHED|0x1F080000))
 
+/*
+ *  IO board type
+ */
+extern int ioid;
diff --git a/power/main.c b/power/main.c
index 565b397f89f478571d48da33cf092aa27ea337b5..3078d5fb6be8132574e858e98447a5ef1ccfe7bc 100644
--- a/power/main.c
+++ b/power/main.c
@@ -34,6 +34,11 @@ char confbuf[4*1024];
  */
 char sysname[64];
 
+/*
+ *  IO board type
+ */
+int ioid;
+
 void
 main(void)
 {
@@ -53,12 +58,13 @@ main(void)
 	chaninit();
 	clockinit();
 	alarminit();
-	io2init();
+	ioboardinit();
 	chandevreset();
 	streaminit();
 	sysloginit();
 	pageinit();
 	userinit();
+	ioboardid();
 	launchinit();
 	schedinit();
 }
@@ -100,15 +106,36 @@ vecinit(void)
 		*p++ = *q++;
 }
 
+void
+ioboardid(void)
+{
+	switch(ioid){
+	case IO2R1:
+		print("IO2 revision 1\n");
+		break;
+	case IO2R2:
+		print("IO2 revision 2\n");
+		break;
+	case IO3R1:
+		print("IO3 revision 1\n");
+		break;
+	default:
+		print("unknown IO board\n");
+		break;
+	}
+}
+
 /*
  *  We have to program both the IO2 board to generate interrupts
  *  and the SBCC on CPU 0 to accept them.
  */
 void
-io2init(void)
+ioboardinit(void)
 {
 	long i;
 
+	ioid = *IOID;
+
 	/*
 	 *  reset VME bus (MODEREG is on the IO2)
 	 */
diff --git a/power/trap.c b/power/trap.c
index b1bf531e4c4eba9af03756d460297d486c26c238..fd25d1f7e6539cf43ec42acbebf7f3533d033ee9 100644
--- a/power/trap.c
+++ b/power/trap.c
@@ -230,16 +230,27 @@ intr(ulong cause, ulong pc)
 	loop:
 		if(pend & 1) {
 			v = INTVECREG->i[0].vec;
-/* a botch, bit 12 seems to always be on
-			if(v & (1<<12))
+			if(!(v & (1<<12)))
 				print("io2 mp bus error %d\n", 0);
- */
-			if(!(v & (1<<2)))
-				lanceintr();
-			if(!(v & (1<<1)))
-				lanceparity();
-			if(!(v & (1<<0)))
-				print("SCSI interrupt\n");
+			switch(ioid){
+			case IO2R1:
+			case IO2R2:
+				if(!(v & (1<<2)))
+					lanceintr();
+				if(!(v & (1<<1)))
+					lanceparity();
+				if(!(v & (1<<0)))
+					print("SCSI interrupt\n");
+				break;
+			case IO3R1:
+				if(v & (1<<2))
+					lance3intr();
+				if(v & (1<<1))
+					print("SCSI 1 interrupt\n");
+				if(v & (1<<0))
+					print("SCSI 0 interrupt\n");
+				break;
+			}
 		}
 		/*
 		 *  5b. process vme
@@ -249,10 +260,8 @@ intr(ulong cause, ulong pc)
 		for(i=1; pend; i++) {
 			if(pend & 1) {
 				v = INTVECREG->i[i].vec;
-/* a botch, bit 12 seems to always be on
-				if(v & (1<<12))
+				if(!(v & (1<<12)))
 					print("io2 mp bus error %d\n", i);
- */
 				v &= 0xff;
 				(*vmevec[v])(v);
 			}
@@ -392,7 +401,7 @@ Syscall syssleep, sysstat, sysuserstr, syswait, syswrite, syswstat;
 
 Syscall *systab[]={
 	[SYSR1]		sysr1,
-	[ACCESS]	sysaccess,
+	[___ACCESS___]	sysaccess,
 	[BIND]		sysbind,
 	[CHDIR]		syschdir,
 	[CLOSE]		sysclose,