From fe51fb42d461fbb026b694e7f3be3bf96cf753ea Mon Sep 17 00:00:00 2001 From: David du Colombier <0intro@gmail.com> Date: Fri, 27 Oct 2000 00:00:00 +0000 Subject: [PATCH] Plan 9 from Bell Labs 2000-10-27 --- bitsy/dat.h | 6 +++--- bitsy/fpiarm.c | 30 +++++++++++------------------- bitsy/main.c | 2 +- bitsy/trap.c | 43 +++++++------------------------------------ pc/sdmylex.c | 10 +--------- port/proc.c | 2 +- 6 files changed, 24 insertions(+), 69 deletions(-) diff --git a/bitsy/dat.h b/bitsy/dat.h index 9207c34f974a8b81d6edba56aaeeff32fdc1833c..858018e70538dfd534a3ff53e3046f3ef4152781 100644 --- a/bitsy/dat.h +++ b/bitsy/dat.h @@ -40,9 +40,9 @@ struct Label */ enum { - FPINIT, - FPACTIVE, - FPINACTIVE, + FPinit, + FPactive, + FPinactive, }; struct FPsave { diff --git a/bitsy/fpiarm.c b/bitsy/fpiarm.c index 92357b97b931a4699e969f13cc53d08869bcc610..757423c74c20dd7212e8a8b76a460a5a9e8d38ae 100644 --- a/bitsy/fpiarm.c +++ b/bitsy/fpiarm.c @@ -15,14 +15,12 @@ #include "fpi.h" -#define R13OK /* undef this if correct kernel r13 isn't in Ureg; * check calculation in fpiarm below */ #define REG(x) (*(long*)(((char*)ur)+roff[(x)])) -#define FPENV (*ufp) #define FR(x) (*(Internal*)ufp->regs[(x)&7]) /* BUG: check fetch (not worthwhile in Inferno) */ @@ -51,7 +49,7 @@ enum { REGPC = 15, }; -int fpemudebug = 0; +int fpemudebug = 1; #undef OFR #define OFR(X) ((ulong)&((Ureg*)0)->X) @@ -60,11 +58,7 @@ static int roff[] = { OFR(r0), OFR(r1), OFR(r2), OFR(r3), OFR(r4), OFR(r5), OFR(r6), OFR(r7), OFR(r8), OFR(r9), OFR(r10), OFR(r11), -#ifdef R13OK OFR(r12), OFR(r13), OFR(r14), OFR(pc), -#else - OFR(r12), OFR(type), OFR(r14), OFR(pc), -#endif }; static Internal fpconst[8] = { /* indexed by op&7 */ @@ -392,22 +386,22 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) print("MOV[FD]W F%d, R%d =%ld\n", rn, rd, REG(rd)); break; case 2: /* FPSR := Rd */ - FPENV.status = REG(rd); + ufp->status = REG(rd); if(fpemudebug) print("MOVW R%d, FPSR\n", rd); break; case 3: /* Rd := FPSR */ - REG(rd) = FPENV.status; + REG(rd) = ufp->status; if(fpemudebug) print("MOVW FPSR, R%d\n", rd); break; case 4: /* FPCR := Rd */ - FPENV.control = REG(rd); + ufp->control = REG(rd); if(fpemudebug) print("MOVW R%d, FPCR\n", rd); break; case 5: /* Rd := FPCR */ - REG(rd) = FPENV.control; + REG(rd) = ufp->control; if(fpemudebug) print("MOVW FPCR, R%d\n", rd); break; @@ -458,25 +452,23 @@ fpiarm(Ureg *ur) FPsave *ufp; int n; -#ifndef R13OK -/* ur->type = &ur->pc+1; /* calculate kernel sp/R13 and put it here for roff[13] */ - ur->type = (ulong)(ur + 1); -#endif if (up == nil) panic("fpiarm not in a process"); ufp = &up->fpsave; /* because all the state is in the proc structure, * it need not be saved/restored */ - if(up->fpstate != FPACTIVE) { - up->fpstate = FPACTIVE; + if(up->fpstate != FPactive) { +// assert(sizeof(Internal) == sizeof(ufp->regs[0])); + up->fpstate = FPactive; ufp->control = 0; ufp->status = (0x01<<28)|(1<<12); /* software emulation, alternative C flag */ for(n = 0; n < 8; n++) FR(n) = fpconst[0]; } - for(n=0;;n++){ - op = getulong(ur->pc); + for(n=0; ;n++){ + validaddr(ur->pc, 4, 0); + op = *(ulong*)(ur->pc); o = (op>>24) & 0xF; if(((op>>8) & 0xF) != 1 || o != 0xE && (o&~1) != 0xC) break; diff --git a/bitsy/main.c b/bitsy/main.c index 2f55b07e1addecfaa4c1524bc8e783ca09406cdc..66834c76cdb59975a363d05b7da25903c709861b 100644 --- a/bitsy/main.c +++ b/bitsy/main.c @@ -229,7 +229,7 @@ userinit(void) void procsetup(Proc *p) { - p->fpstate = FPINIT; + p->fpstate = FPinit; } /* diff --git a/bitsy/trap.c b/bitsy/trap.c index e7f553757232dbaf8132ffcd09bf304e6cdc645e..032750f1fc85164ac31d10d104357d2f17c902bd 100644 --- a/bitsy/trap.c +++ b/bitsy/trap.c @@ -265,52 +265,23 @@ trap(Ureg *ureg) } break; case PsrMund: /* undefined instruction */ -#ifdef NOTDEF - /* Inferno break handling, something for us? [SJM] */ - if(*(ulong*)ureg->pc == BREAK && breakhandler) { - int s; - Proc *p; - - p = up; - /* if (!waslo(ureg->psr) || (ureg->pc >= (ulong)splhi && ureg->pc < (ulong)islo)) - p = 0; */ - s = breakhandler(ureg, p); - if(s == BrkSched) { - c.callsched = 1; - sched(); - } else if(s == BrkNoSched) { - c.callsched = 0; - if(up) - up->dbgreg = 0; - return; - } - break; - } - /* End of Inferno break handling [SJM] */ -#endif /* start of Inferno code [SJM] */ spllo(); if (waserror()) { warnregs(ureg, "floating point error"); panic("floating point error"); } - if (!fpiarm(ureg)) { - warnregs(ureg, "illegal instruction"); - panic("illegal instruction"); - } - poperror(); - /* end of Inferno code [SJM] */ -#ifdef NOTDEF - /* We'll see what we do with this later [SJM] */ - if(user){ - sprint(buf, "undefined instruction: pc 0x%lux\n", - ureg->pc); - postnote(up, 1, buf, NDebug); + if (user) { + if (!fpiarm(ureg)) { + sprint(buf, "undefined instruction: pc 0x%lux\n", ureg->pc); + postnote(up, 1, buf, NDebug); + } }else{ warnregs(ureg, "undefined instruction"); panic("undefined instruction"); } -#endif + poperror(); + /* end of Inferno code [SJM] */ break; } diff --git a/pc/sdmylex.c b/pc/sdmylex.c index c9ff5c320fa2db542a9558eadac0a74acbdf892e..a2659ffa8e3c0d84b4085f5078597c58335be5e6 100644 --- a/pc/sdmylex.c +++ b/pc/sdmylex.c @@ -630,17 +630,9 @@ mylex32rio(SDreq* r) */ while(waserror()) ; - tsleep(ccb, done32, ccb, 30*1000); + sleep(ccb, done32, ccb); poperror(); - if(!done32(ccb)){ - print("%s: %d/%d: sd32rio timeout\n", - ctlr->sdev->name, target, r->lun); - ccbfree(ctlr, (Ccb*)ccb); - - return SDtimeout; - } - /* * Save the status and patch up the number of * bytes actually transferred. diff --git a/port/proc.c b/port/proc.c index aeb542646e7fb6c2a3b0ae28e1d0bc3a299ce88e..2aa7721edb5c9d43ad0e908de60bffb35f46b8c3 100644 --- a/port/proc.c +++ b/port/proc.c @@ -327,7 +327,7 @@ newproc(void) p->fgrp = 0; p->rgrp = 0; p->pdbg = 0; - p->fpstate = FPINIT; + p->fpstate = FPinit; p->kp = 0; p->procctl = 0; p->notepending = 0;