~kris/9p

9hist

fc19d1f51967d4902c3d129845ae002cd7fb3ec8 — David du Colombier 31 years ago fd28a4f
Plan 9 from Bell Labs 1994-11-17
4 files changed, 50 insertions(+), 58 deletions(-)

M pc/devastar.c
M pc/devvga.c
M port/devns16552.c
M port/qio.c
M pc/devastar.c => pc/devastar.c +14 -8
@@ 344,17 344,17 @@ astargen(Chan *c, Dirtab *tab, int ntab, int i, Dir *db)
			t = i%3;
			switch(t){
			case 0:
				sprint(db->name, "eia%d%2.2d", dev, ch);
				sprint(db->name, "eia%d%2.2d", dev, ch+1);
				db->mode = astar[dev]->c[ch].perm;
				db->qid.path = QID(dev, ch, Qdata);
				break;
			case 1:
				sprint(db->name, "eia%d%2.2dctl", dev, ch);
				sprint(db->name, "eia%d%2.2dctl", dev, ch+1);
				db->mode = astar[dev]->c[ch].perm;
				db->qid.path = QID(dev, ch, Qctl);
				break;
			case 2:
				sprint(db->name, "eia%d%2.2dstat", dev, ch);
				sprint(db->name, "eia%d%2.2dstat", dev, ch+1);
				db->mode = 0444;
				db->qid.path = QID(dev, ch, Qstat);
				break;


@@ 918,9 918,15 @@ enable(Astarchan *ac)
static void
disable(Astarchan *ac)
{
	int n;

	astarctl(ac, "d0");
	astarctl(ac, "r0");

	LOCKPAGE(ac->a, 0);
	n = LEUS(ac->ccb->proto) | Cmctl;
	ac->ccb->proto = LEUS(n);
	UNLOCKPAGE(ac->a);
	chancmd(ac, Crcvdis|Cxmtdis|Cflushin|Cflushout|Cconfall);
}



@@ 1165,7 1171,7 @@ astarwstat(Chan *c, char *dp)
 *  get output going
 */
static void
astarkick1(Astarchan *ac)
astaroutput(Astarchan *ac)
{
	Astar *a = ac->a;
	CCB *ccb = ac->ccb;


@@ 1208,7 1214,7 @@ static void
astarkick(Astarchan *ac)
{
	ilock(&ac->a->pagelock);
	astarkick1(ac);
	astaroutput(ac);
	iunlock(&ac->a->pagelock);
}



@@ 1247,7 1253,7 @@ astarinput(Astarchan *ac)
			if(rp > ep)
				rp = bp;
		}
		if(qroduce(ac->iq, buf, n) < 0)
		if(qproduce(ac->iq, buf, n) < 0)
			break;	/* flow controlled */
		if(a->needpage)
			setpage(a, 0);


@@ 1261,7 1267,7 @@ astarinput(Astarchan *ac)
 *  get flow controlled input going again
 */
static void
astarkick(Astarchan *ac)
astarkickin(Astarchan *ac)
{
	ilock(&ac->a->pagelock);
	astarinput(ac);


@@ 1306,7 1312,7 @@ astarintr(Ureg *ur, void *arg)
	ac = a->c;
	for(vec = outvec; vec; vec >>= 1){
		if(vec&1)
			astarkick1(ac);
			astaroutput(ac);
		ac++;
	}
	ac = a->c;

M pc/devvga.c => pc/devvga.c +4 -36
@@ 58,8 58,9 @@ struct Vgacard
	void	(*setpage)(int);	/* routine to page though display memory */
};

static void	nopage(int), et4000page(int), tridentpage(int);
static void	atipage(int), cirruspage(int);
static void	nopage(int);
static void	cirruspage(int);
static void	et4000page(int);
extern void	s3page(int);

Vgacard vgachips[] =


@@ 1067,40 1068,6 @@ nopage(int page)
	USED(page);
}

/*
 * Extended registers can be read with inb(), but must be
 * written with outs(). The index must be written each time
 * before the register is accessed.
 * The page bits are spread across registers 0xAE and 0xB2.
 * This can go away when we use the memory aperture.
 */
static void
atipage(int page)
{
	/* the ext register is in the ATI ROM at a fixed address */
	ushort extreg = *((ushort *)0x800C0010);
	uchar v;

	outb(extreg, 0xAE);
	v = (inb(extreg+1) & 0xFC)|((page>>4) & 0x03);
	outs(extreg, (v<<8)|0xAE);

	outb(extreg, 0xB2);
	v = (inb(extreg+1) & 0xE1)|((page & 0x0F)<<1);
	outs(extreg, (v<<8)|0xB2);
}

/*
 * The following assumes that the new mode registers have been selected.
 */
static void
tridentpage(int page)
{
	uchar seq0E;

	seq0E = vgaxi(Seqx, 0x0E) & 0xF0;
	vgaxo(Seqx, 0x0E, seq0E|(page^0x02));
}
static void
et4000page(int page)
{


@@ 1114,6 1081,7 @@ et4000page(int page)
	p |= p>>4;
	outb(0x3CB, p);
}

static void
cirruspage(int page)
{

M port/devns16552.c => port/devns16552.c +29 -4
@@ 97,8 97,9 @@ struct Uart
	int	xonoff;		/* software flow control on */
	int	blocked;
	int	modem;		/* hardware flow control on */
	int	cts;
	int	cts;		/* ... cts state */
	int	ctsbackoff;
	int	rts;		/* ... rts state */
	Rendez	r;

	/* buffers */


@@ 204,12 205,21 @@ ns16552dtr(Uart *p, int n)
void
ns16552rts(Uart *p, int n)
{
	int x;

	x = splhi();
	lock(&p->plock);

	if(n)
		p->sticky[Mctl] |= Rts;
	else
		p->sticky[Mctl] &= ~Rts;

	uartwrreg(p, Mctl, 0);
	p->rts = n;

	unlock(&p->plock);
	splx(x);
}

/*


@@ 309,6 319,7 @@ ns16552enable(Uart *p)
	 */
	ns16552dtr(p, 1);
	ns16552rts(p, 1);
	ns16552setbaud(p, 9600);

	/*
	 *  assume we can send


@@ 417,6 428,18 @@ ns16552kick(Uart *p)
}

/*
 *  restart input if its off
 */
static void
ns16552flow(Uart *p)
{
	if(p->modem){
		ns16552rts(p, 1);
		haveinput = 1;
	}
}

/*
 *  default is 9600 baud, 1 stop bit, 8 bit chars, no interrupts,
 *  transmit and receive enabled, interrupts disabled.
 */


@@ 437,7 460,7 @@ ns16552setup0(Uart *p)

	ns16552setbaud(p, 9600);

	p->iq = qopen(4*1024, 0, 0, 0);
	p->iq = qopen(4*1024, 0, ns16552flow, p);
	p->oq = qopen(4*1024, 0, ns16552kick, p);

	p->ip = p->istage;


@@ 613,8 636,10 @@ uartclock(void)
			if(n > 0 && p->iq){
				if(n > Stagesize)
					panic("uartclock");
				qproduce(p->iq, p->istage, n);
				p->ip = p->istage;
				if(qproduce(p->iq, p->istage, n) < 0)
					ns16552rts(p, 0);
				else
					p->ip = p->istage;
			}
		}
		if(p->ctsbackoff-- < 0){

M port/qio.c => port/qio.c +3 -10
@@ 253,11 253,8 @@ qpass(Queue *q, Block *b)
	}
	iunlock(q);

	if(dowakeup){
		if(q->kick)
			(*q->kick)(q->arg);
	if(dowakeup)
		wakeup(&q->rr);
	}

	return len;
}


@@ 302,9 299,8 @@ qproduce(Queue *q, void *vp, int len)
	/* save in buffer */
	b = iallocb(len);
	if(b == 0){
		q->state |= Qflow;
		unlock(q);
		return -2;
		return 0;
	}
	memmove(b->wp, p, len);
	b->wp += len;


@@ 322,11 318,8 @@ qproduce(Queue *q, void *vp, int len)
	}
	unlock(q);

	if(dowakeup){
		if(q->kick)
			(*q->kick)(q->arg);
	if(dowakeup)
		wakeup(&q->rr);
	}

	return len;
}