From eed620fae0fa375a842e81463a6233957dfc3fc4 Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Tue, 12 Dec 2000 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 2000-12-12

---
 "bitsy/dev\302\265c.c" |  4 ++--
 bitsy/l.s              | 12 ++++++++++--
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git "a/bitsy/dev\302\265c.c" "b/bitsy/dev\302\265c.c"
index 4dd6fa8291d1a6b8999dbe7f2787f9edc2136f47..0fe48bfb6c836ca912eeab6b37f08cd236ba0983 100644
--- "a/bitsy/dev\302\265c.c"
+++ "b/bitsy/dev\302\265c.c"
@@ -81,7 +81,7 @@ static struct µcontroller
 /* button map */
 Rune bmap[4] = 
 {
-	Kup, Kright, Kdown, Kleft
+	Kup, Kright, Kleft, Kdown
 };
 
 int
@@ -143,7 +143,7 @@ int
 
 			if(b > 5) {
 				/* rocker panel acts like arrow keys */
-				if(b < 10)
+				if(b < 10 && !up)
 					kbdputc(kbdq, bmap[b-6]);
 			} else {
 				/* the rest like mouse buttons */
diff --git a/bitsy/l.s b/bitsy/l.s
index f6ce6dee9a44a7a6366941c1629b6b176156f61e..a5b85223c9ea47b52d7fc5091c6f19328157e567 100644
--- a/bitsy/l.s
+++ b/bitsy/l.s
@@ -46,13 +46,18 @@ TEXT mmuinvalidateaddr(SB), $-4
 
 /* write back and invalidate i and d caches */
 TEXT cacheflush(SB), $-4
+	/* splhi */
+	MOVW	CPSR, R3
+	ORR	$(PsrDirq), R3, R1
+	MOVW	R1, CPSR
+
 	/* write back any dirty data */
 	MOVW	$0xe0000000,R0
 	ADD	$(8*1024),R0,R1
 _cfloop:
 	MOVW.P	32(R0),R2
 	CMP.S	R0,R1
-	BNE	_cfloop
+	BGE	_cfloop
 	
 	/* drain write buffer and invalidate i cache contents */
 	MCR	CpMMU, 0, R0, C(CpCacheFlush), C(0xa), 4
@@ -63,6 +68,9 @@ _cfloop:
 	MOVW	R0,R0
 	MOVW	R0,R0
 	MOVW	R0,R0
+
+	/* splx */
+	MOVW	R3, CPSR
 	RET
 
 /* write back d cache */
@@ -74,7 +82,7 @@ _cachewb:
 _cwbloop:
 	MOVW.P	32(R0),R2
 	CMP.S	R0,R1
-	BNE	_cwbloop
+	BGE	_cwbloop
 	
 	/* drain write buffer */
 	MCR	CpMMU, 0, R0, C(CpCacheFlush), C(0xa), 4