~kris/9p

9hist

e6b64b25209d14786cb0839f69a81b705b3d5110 — David du Colombier 32 years ago 86b9c73
Plan 9 from Bell Labs 1994-06-14
5 files changed, 165 insertions(+), 157 deletions(-)

M carrera/dat.h
M carrera/l.s
M carrera/mem.h
M carrera/trap.c
M carrera/ureg.h
M carrera/dat.h => carrera/dat.h +1 -2
@@ 81,8 81,7 @@ struct PMMU
struct Notsave
{
	ulong	svstatus;
	long	svr1;
	long	svhr1;
	ulong	svr1;
};

#include "../port/portdat.h"

M carrera/l.s => carrera/l.s +91 -75
@@ 12,6 12,10 @@
/*
 *  R4000 instructions
 */
#define	LD(offset, base, rt)	WORD	$((067<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
#define	STD(rt, offset, base)	WORD	$((077<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
#define	DSLL(sa, rt, rd)	WORD	$(((rt)<<16)|((rd)<<11)|((sa)<<6)|070)
#define	DSRA(sa, rt, rd)	WORD	$(((rt)<<16)|((rd)<<11)|((sa)<<6)|073)
#define	LL(base, rt)		WORD	$((060<<26)|((base)<<21)|((rt)<<16))
#define	SC(base, rt)		WORD	$((070<<26)|((base)<<21)|((rt)<<16))



@@ 373,11 377,11 @@ wasuser:
	ADDU	$(KSTACK-UREGSIZE), R27, SP

	MOVW	R26, Ureg_sp(SP)	/* user SP */
	MOVV	R31, Ureg_r31(SP)
	MOVV	R30, Ureg_r30(SP)
	MOVW	R31, Ureg_r31(SP)
	MOVW	R30, Ureg_r30(SP)
	MOVW	M(CAUSE), R26
	MOVV	R(MACH), Ureg_r25(SP)
	MOVV	R(USER), Ureg_r24(SP)
	MOVW	R(MACH), Ureg_r25(SP)
	MOVW	R(USER), Ureg_r24(SP)
	AND	$(EXCMASK<<2), R26
	SUBU	$(CSYS<<2), R26



@@ 393,9 397,9 @@ wasuser:
	JAL	syscall(SB)

sysrestore:
	MOVV	Ureg_r31(SP), R31
	MOVW	Ureg_r31(SP), R31
	MOVW	Ureg_status(SP), R26
	MOVV	Ureg_r30(SP), R30
	MOVW	Ureg_r30(SP), R30
	MOVW	R26, M(STATUS)
	WAIT
	MOVW	Ureg_pc(SP), R26		/* old pc */


@@ 403,18 407,14 @@ sysrestore:
	MOVW	R26, M(EPC)
	ERET

TEXT	forkret(SB), $0
	MOVW	R0, R1			/* Fake out system call return */
	JMP	sysrestore

notsys:
	JAL	trap(SB)
restore:
	JAL	restregs(SB)
	MOVV	Ureg_r31(SP), R31
	MOVV	Ureg_r30(SP), R30
	MOVV	Ureg_r25(SP), R(MACH)
	MOVV	Ureg_r24(SP), R(USER)
	MOVW	Ureg_r31(SP), R31
	MOVW	Ureg_r30(SP), R30
	MOVW	Ureg_r25(SP), R(MACH)
	MOVW	Ureg_r24(SP), R(USER)
	MOVW	Ureg_sp(SP), SP
	MOVW	R26, M(EPC)
	ERET


@@ 425,22 425,30 @@ waskernel:
	OR	$7, SP
	XOR	$7, SP
	MOVW	R26, Ureg_sp(SP)
	MOVV	R31, Ureg_r31(SP)
	MOVW	R31, Ureg_r31(SP)
	MOVW	$1, R26			/* not syscall */
	JAL	saveregs(SB)
	MOVW	4(SP), R1		/* first arg for trap */
	JAL	trap(SB)
	JAL	restregs(SB)
	MOVV	Ureg_r31(SP), R31
	MOVW	Ureg_r31(SP), R31
	MOVW	Ureg_sp(SP), SP
	MOVW	R26, M(EPC)
	ERET

TEXT	forkret(SB), $0
	MOVW	R0, R1			/* Fake out system call return */
	JMP	sysrestore

TEXT	saveregs(SB), $-4
	MOVV	R1, Ureg_r1(SP)
	MOVV	R2, Ureg_r2(SP)
	MOVV	R5, Ureg_r5(SP)
	MOVV	R6, Ureg_r6(SP)
	MOVW	R1, Ureg_r1(SP)
	MOVW	R2, Ureg_r2(SP)
	/* save R5, R6 as 64 bits */
	ADDU	$(UREGSIZE-16), SP, R1
	MOVW	$~7, R2			/* don't let him use R28 */
	AND		R2, R1
	STD		(5, 0,(1))
	STD		(6, 8,(1))
	ADDU	$Uoffset, SP, R1
	MOVW	R1, 4(SP)		/* arg to base of regs */
	MOVW	M(STATUS), R1


@@ 463,74 471,82 @@ TEXT	saveregs(SB), $-4
	NOOP
	MOVW	R2, Ureg_badvaddr(SP)
	MOVW	R1, Ureg_tlbvirt(SP)

	MOVV	HI, R1
	MOVV	LO, R2
	MOVV	R1, Ureg_hi(SP)
	MOVV	R2, Ureg_lo(SP)
	MOVW	HI, R1
	MOVW	LO, R2
	MOVW	R1, Ureg_hi(SP)
	MOVW	R2, Ureg_lo(SP)
					/* LINK,SB,SP missing */
	MOVV	R28, Ureg_r28(SP)
	MOVW	R28, Ureg_r28(SP)
					/* R27, R26 not saved */
					/* R25, R24 missing */
	MOVV	R23, Ureg_r23(SP)
	MOVV	R22, Ureg_r22(SP)
	MOVV	R21, Ureg_r21(SP)
	MOVV	R20, Ureg_r20(SP)
	MOVV	R19, Ureg_r19(SP)
	MOVV	R18, Ureg_r18(SP)
	MOVV	R17, Ureg_r17(SP)
	MOVV	R16, Ureg_r16(SP)
	MOVV	R15, Ureg_r15(SP)
	MOVV	R14, Ureg_r14(SP)
	MOVV	R13, Ureg_r13(SP)
	MOVV	R12, Ureg_r12(SP)
	MOVV	R11, Ureg_r11(SP)
	MOVV	R10, Ureg_r10(SP)
	MOVV	R9, Ureg_r9(SP)
	MOVV	R8, Ureg_r8(SP)
	MOVV	R7, Ureg_r7(SP)
	MOVV	R6, Ureg_r6(SP)
	MOVV	R5, Ureg_r5(SP)
	MOVV	R4, Ureg_r4(SP)
	MOVV	R3, Ureg_r3(SP)
	MOVW	R23, Ureg_r23(SP)
	MOVW	R22, Ureg_r22(SP)
	MOVW	R21, Ureg_r21(SP)
	MOVW	R20, Ureg_r20(SP)
	MOVW	R19, Ureg_r19(SP)
	MOVW	R18, Ureg_r18(SP)
	MOVW	R17, Ureg_r17(SP)
	MOVW	R16, Ureg_r16(SP)
	MOVW	R15, Ureg_r15(SP)
	MOVW	R14, Ureg_r14(SP)
	MOVW	R13, Ureg_r13(SP)
	MOVW	R12, Ureg_r12(SP)
	MOVW	R11, Ureg_r11(SP)
	MOVW	R10, Ureg_r10(SP)
	MOVW	R9, Ureg_r9(SP)
	MOVW	R8, Ureg_r8(SP)
	MOVW	R7, Ureg_r7(SP)
	MOVW	R6, Ureg_r6(SP)
	MOVW	R5, Ureg_r5(SP)
	MOVW	R4, Ureg_r4(SP)
	MOVW	R3, Ureg_r3(SP)
return:
	RET

TEXT	restregs(SB), $-4
					/* LINK,SB,SP missing */
	MOVV	Ureg_r28(SP), R28
	MOVW	Ureg_r28(SP), R28
					/* R27, R26 not saved */
					/* R25, R24 missing */
	MOVV	Ureg_r23(SP), R23
	MOVV	Ureg_r22(SP), R22
	MOVV	Ureg_r21(SP), R21
	MOVV	Ureg_r20(SP), R20
	MOVV	Ureg_r19(SP), R19
	MOVV	Ureg_r18(SP), R18
	MOVV	Ureg_r17(SP), R17
	MOVV	Ureg_r16(SP), R16
	MOVV	Ureg_r15(SP), R15
	MOVV	Ureg_r14(SP), R14
	MOVV	Ureg_r13(SP), R13
	MOVV	Ureg_r12(SP), R12
	MOVV	Ureg_r11(SP), R11
	MOVV	Ureg_r10(SP), R10
	MOVV	Ureg_r9(SP), R9
	MOVV	Ureg_r8(SP), R8
	MOVV	Ureg_r7(SP), R7
	MOVV	Ureg_r6(SP), R6
	MOVV	Ureg_r5(SP), R5
	MOVV	Ureg_r4(SP), R4
	MOVV	Ureg_r3(SP), R3
	MOVV	Ureg_lo(SP), R2
	MOVV	Ureg_hi(SP), R1
	MOVV	R2, LO
	MOVV	R1, HI
	MOVW	Ureg_r23(SP), R23
	MOVW	Ureg_r22(SP), R22
	MOVW	Ureg_r21(SP), R21
	MOVW	Ureg_r20(SP), R20
	MOVW	Ureg_r19(SP), R19
	MOVW	Ureg_r18(SP), R18
	MOVW	Ureg_r17(SP), R17
	MOVW	Ureg_r16(SP), R16
	MOVW	Ureg_r15(SP), R15
	MOVW	Ureg_r14(SP), R14
	MOVW	Ureg_r13(SP), R13
	MOVW	Ureg_r12(SP), R12
	MOVW	Ureg_r11(SP), R11
	MOVW	Ureg_r10(SP), R10
	MOVW	Ureg_r9(SP), R9
	MOVW	Ureg_r8(SP), R8
	MOVW	Ureg_r7(SP), R7
	/*
	 * restored below
	 * MOVW	Ureg_r6(SP), R6
	 * MOVW	Ureg_r5(SP), R5
	 */
	MOVW	Ureg_r4(SP), R4
	MOVW	Ureg_r3(SP), R3
	MOVW	Ureg_lo(SP), R2
	MOVW	Ureg_hi(SP), R1
	MOVW	R2, LO
	MOVW	R1, HI
	/* restore 64-bit R5, R6 */
	ADDU	$(UREGSIZE-16), SP, R1
	MOVW	$~7, R2			/* don't let him use R28 */
	AND		R2, R1
	LD		(0,(1), 5)
	LD		(8,(1), 6)
	MOVW	Ureg_status(SP), R1
	MOVV	Ureg_r2(SP), R2
	MOVW	Ureg_r2(SP), R2
	MOVW	R1, M(STATUS)
	WAIT
	MOVV	Ureg_r1(SP), R1
	MOVW	Ureg_r1(SP), R1
	MOVW	Ureg_pc(SP), R26
	RET


M carrera/mem.h => carrera/mem.h +33 -35
@@ 110,42 110,40 @@
#define	Ureg_cause	(Uoffset+12)
#define	Ureg_badvaddr	(Uoffset+16)
#define	Ureg_tlbvirt	(Uoffset+20)

#define	Ureg_hi		(Uoffset+28-4)
#define	Ureg_lo		(Uoffset+36-4)
#define	Ureg_r31	(Uoffset+44-4)
#define	Ureg_r30	(Uoffset+52-4)
#define	Ureg_r28	(Uoffset+60-4)
#define	Ureg_r27	(Uoffset+68-4)
#define	Ureg_r26	(Uoffset+76-4)
#define	Ureg_r25	(Uoffset+84-4)
#define	Ureg_r24	(Uoffset+92-4)
#define	Ureg_r23	(Uoffset+100-4)
#define	Ureg_r22	(Uoffset+108-4)
#define	Ureg_r21	(Uoffset+116-4)
#define	Ureg_r20	(Uoffset+124-4)
#define	Ureg_r19	(Uoffset+132-4)
#define	Ureg_r18	(Uoffset+140-4)
#define	Ureg_r17	(Uoffset+148-4)
#define	Ureg_r16	(Uoffset+156-4)
#define	Ureg_r15	(Uoffset+164-4)
#define	Ureg_r14	(Uoffset+172-4)
#define	Ureg_r13	(Uoffset+180-4)
#define	Ureg_r12	(Uoffset+188-4)
#define	Ureg_r11	(Uoffset+196-4)
#define	Ureg_r10	(Uoffset+204-4)
#define	Ureg_r9		(Uoffset+212-4)
#define	Ureg_r8		(Uoffset+220-4)
#define	Ureg_r7		(Uoffset+228-4)
#define	Ureg_r6		(Uoffset+236-4)
#define	Ureg_r5		(Uoffset+244-4)
#define	Ureg_r4		(Uoffset+252-4)
#define	Ureg_r3		(Uoffset+260-4)
#define	Ureg_r2		(Uoffset+268-4)
#define	Ureg_r1		(Uoffset+276-4)

#define	Ureg_hi		(Uoffset+28)
#define	Ureg_lo		(Uoffset+36)
#define	Ureg_r31	(Uoffset+44)
#define	Ureg_r30	(Uoffset+52)
#define	Ureg_r28	(Uoffset+60)
#define	Ureg_r27	(Uoffset+68)
#define	Ureg_r26	(Uoffset+76)
#define	Ureg_r25	(Uoffset+84)
#define	Ureg_r24	(Uoffset+92)
#define	Ureg_r23	(Uoffset+100)
#define	Ureg_r22	(Uoffset+108)
#define	Ureg_r21	(Uoffset+116)
#define	Ureg_r20	(Uoffset+124)
#define	Ureg_r19	(Uoffset+132)
#define	Ureg_r18	(Uoffset+140)
#define	Ureg_r17	(Uoffset+148)
#define	Ureg_r16	(Uoffset+156)
#define	Ureg_r15	(Uoffset+164)
#define	Ureg_r14	(Uoffset+172)
#define	Ureg_r13	(Uoffset+180)
#define	Ureg_r12	(Uoffset+188)
#define	Ureg_r11	(Uoffset+196)
#define	Ureg_r10	(Uoffset+204)
#define	Ureg_r9		(Uoffset+212)
#define	Ureg_r8		(Uoffset+220)
#define	Ureg_r7		(Uoffset+228)
#define	Ureg_r6		(Uoffset+236)
#define	Ureg_r5		(Uoffset+244)
#define	Ureg_r4		(Uoffset+252)
#define	Ureg_r3		(Uoffset+260)
#define	Ureg_r2		(Uoffset+268)
#define	Ureg_r1		(Uoffset+276)
/* Sizeof(Ureg) + (R5,R6) + 16 bytes slop + retpc + ur */
#define	UREGSIZE	((Ureg_r1+8-Uoffset) + 16 + 16 + 4 + 4)
#define	UREGSIZE	((Ureg_r1+4-Uoffset) + 16 + 16 + 4 + 4)
#define	Uoffset		8

/*

M carrera/trap.c => carrera/trap.c +8 -13
@@ 253,7 253,7 @@ trap(Ureg *ur)
			postnote(up, 1, buf, NDebug);
			break;
		}
		print("kernel %s pc=%lux\n", excname[ecode], ur->pc);
		print("kernel %s pc=%llux\n", excname[ecode], ur->pc);
		dumpregs(ur);
		dumpstack();
		if(m->machno == 0)


@@ 392,7 392,7 @@ fpexcname(Ureg *ur, ulong fcr31, char *buf)
{
	int i;
	char *s;
	ulong fppc;
	uvlong fppc;

	fppc = ur->pc;
	if(ur->cause & (1<<31))	/* branch delay */


@@ 411,7 411,7 @@ fpexcname(Ureg *ur, ulong fcr31, char *buf)
	if(s == 0)
		return "no floating point exception";

	sprint(buf, "%s fppc=0x%lux", s, fppc);
	sprint(buf, "%s fppc=0x%llux", s, fppc);
	return buf;
}



@@ 421,7 421,7 @@ void
kernfault(Ureg *ur, int code)
{
	print("kfault %s badvaddr=0x%lux\n", excname[code], ur->badvaddr);
	print("UP=0x%lux SR=0x%lux PC=0x%lux R31=%lux SP=0x%lux\n",
	print("UP=0x%lux SR=0x%lux PC=0x%llux R31=%llux SP=0x%llux\n",
				up, ur->status, ur->pc, ur->r31, ur->sp);

	dumpregs(ur);


@@ 487,7 487,7 @@ notify(Ureg *ur)
		if(l > ERRLEN-23)	/* " pc=0x12345678\0" */
			l = ERRLEN-23;

		sprint(n->msg+l, " pc=0x%lux", ur->pc);
		sprint(n->msg+l, " pc=0x%llux", ur->pc);
	}

	if(n->flag != NUser && (up->notified || up->notify==0)) {


@@ 526,11 526,7 @@ notify(Ureg *ur)
	sp -= 3*BY2WD;
	*(ulong*)(sp+2*BY2WD) = sp+3*BY2WD;	/* arg 2 is string */
	up->svr1 = ur->r1;			/* save away r1 */
	up->svhr1 = ur->hr1;			/* save away r1 */
	ur->r1 = (long)up->ureg;		/* arg 1 is ureg* */
	ur->hr1 = 0;
	if(ur->r1 < 0)
		ur->hr1 = ~0;
	ur->r1 = (ulong)up->ureg;		/* arg 1 is ureg* */
	((ulong*)sp)[1] = (ulong)up->ureg;	/* arg 1 0(FP) is ureg* */
	((ulong*)sp)[0] = 0;			/* arg 0 is pc */
	ur->usp = sp;


@@ 570,7 566,6 @@ noted(Ureg **urp, ulong arg0)

	memmove(*urp, up->ureg, sizeof(Ureg));
	(*urp)->r1 = up->svr1;
	(*urp)->hr1 = up->svhr1;
	switch(arg0) {
	case NCONT:
		if(!okaddr(nur->pc, 1, 0) || !okaddr(nur->usp, BY2WD, 0)){


@@ 632,13 627,13 @@ syscall(Ureg *aur)
		goto error;

	if(up->scallnr >= nsyscall){
		pprint("bad sys call %d pc %lux\n", up->scallnr, ur->pc);
		pprint("bad sys call %d pc %llux\n", up->scallnr, ur->pc);
		postnote(up, 1, "sys: bad sys call", NDebug);
		error(Ebadarg);
	}

	if(sp & (BY2WD-1)){
		pprint("odd sp in sys call pc %lux sp %lux\n", ur->pc, ur->sp);
		pprint("odd sp in sys call pc %llux sp %llux\n", ur->pc, ur->sp);
		postnote(up, 1, "sys: odd stack", NDebug);
		error(Ebadarg);
	}

M carrera/ureg.h => carrera/ureg.h +32 -32
@@ 11,36 11,36 @@ struct Ureg
	ulong	badvaddr;
	ulong	tlbvirt;

	long	hhi;	long	hi;
	long	hlo;	long	lo;
	long	hr31;	long	r31;
	long	hr30;	long	r30;
	long	hr28;	long	r28;
	long	hr27;	long	r27;
	long	hr26;	long	r26;
	long	hr25;	long	r25;
	long	hr24;	long	r24;
	long	hr23;	long	r23;
	long	hr22;	long	r22;
	long	hr21;	long	r21;
	long	hr20;	long	r20;
	long	hr19;	long	r19;
	long	hr18;	long	r18;
	long	hr17;	long	r17;
	long	hr16;	long	r16;
	long	hr15;	long	r15;
	long	hr14;	long	r14;
	long	hr13;	long	r13;
	long	hr12;	long	r12;
	long	hr11;	long	r11;
	long	hr10;	long	r10;
	long	hr9;	long	r9;
	long	hr8;	long	r8;
	long	hr7;	long	r7;
	long	hr6;	long	r6;
	long	hr5;	long	r5;
	long	hr4;	long	r4;
	long	hr3;	long	r3;
	long	hr2;	long	r2;
	long	hr1;	long	r1;
	long	pad;	long	hi;
	long	pad;	long	lo;
	long	pad;	long	r31;
	long	pad;	long	r30;
	long	pad;	long	r28;
	long	pad;	long	r27;
	long	pad;	long	r26;
	long	pad;	long	r25;
	long	pad;	long	r24;
	long	pad;	long	r23;
	long	pad;	long	r22;
	long	pad;	long	r21;
	long	pad;	long	r20;
	long	pad;	long	r19;
	long	pad;	long	r18;
	long	pad;	long	r17;
	long	pad;	long	r16;
	long	pad;	long	r15;
	long	pad;	long	r14;
	long	pad;	long	r13;
	long	pad;	long	r12;
	long	pad;	long	r11;
	long	pad;	long	r10;
	long	pad;	long	r9;
	long	pad;	long	r8;
	long	pad;	long	r7;
	long	pad;	long	r6;
	long	pad;	long	r5;
	long	pad;	long	r4;
	long	pad;	long	r3;
	long	pad;	long	r2;
	long	pad;	long	r1;
};