~kris/9p

9hist

def14cb134adf0fb42d45d20c651a6140c8849d9 — David du Colombier 24 years ago d8a8959
Plan 9 from Bell Labs 2002-07-03
M bitsy/dat.h => bitsy/dat.h +1 -1
@@ 262,6 262,6 @@ struct DevConf
	ulong	port;		/* mapped i/o regs */
	int		size;		/* access size */
	int		itype;	/* type of interrupt */
	ulong	intnum;	/* interrupt number */
	ulong	irq;		/* interrupt number */
	char		*type;	/* card type, mallocated */
};

M bitsy/devether.c => bitsy/devether.c +1 -1
@@ 110,7 110,7 @@ etherconfig(int on, char *spec, DevConf *cf)
		ether->maxmtu = ETHERMAXTU;

		if(ether->interrupt != nil)
			intrenable(cf->itype, cf->intnum, ether->interrupt, ether, name);
			intrenable(cf->itype, cf->irq, ether->interrupt, ether, name);

		p = buf;
		e = buf+sizeof(buf);

M bitsy/devpcmcia.c => bitsy/devpcmcia.c +1 -1
@@ 338,7 338,7 @@ pcmctlwrite(char *p, long n, ulong, PCMslot *sp)
		cf.mem = (ulong)sp->mem;
		cf.port = (ulong)sp->regs;
		cf.itype = GPIOfalling;
		cf.intnum = bitno(sp == slot ? GPIO_CARD_IRQ0_i : GPIO_CARD_IRQ1_i);
		cf.irq = bitno(sp == slot ? GPIO_CARD_IRQ0_i : GPIO_CARD_IRQ1_i);
		if(devtab[dtx]->config(1, p, &cf) < 0)
			error("couldn't configure device");
		sp->dev = devtab[dtx];

M pc/dat.h => pc/dat.h +8 -8
@@ 29,7 29,7 @@ struct Lock
	ulong	key;
	ulong	sr;
	ulong	pc;
	Proc	*	p;
	Proc	*p;
	ushort	isilock;
};



@@ 177,7 177,7 @@ struct Mach
	int	intr;
	vlong	intrts;			/* time stamp of last interrupt */
	int	flushmmu;		/* make current proc flush it's mmu state */
	int		ilockdepth;
	int	ilockdepth;

	ulong	spuriousintr;
	int	lastintr;


@@ 247,7 247,7 @@ struct PCArch
#define NISAOPT		8

struct ISAConf {
	char		*type;
	char	*type;
	ulong	port;
	ulong	irq;
	ulong	dma;


@@ 279,13 279,13 @@ extern Mach	*m;
 */
typedef struct {
	ulong	port;	
	int		size;
	int	size;
} port_t;

struct DevConf
{
	ulong	interrupt;	/* interrupt number */
	char		*type;	/* card type, malloced */
	int		nports;	/* Number of ports */
	port_t	*ports;	/* The ports themselves */
	ulong	intnum;	/* interrupt number */
	char	*type;		/* card type, malloced */
	int	nports;		/* Number of ports */
	port_t	*ports;		/* The ports themselves */
};

M pc/devarch.c => pc/devarch.c +7 -6
@@ 11,7 11,7 @@ typedef struct IOMap IOMap;
struct IOMap
{
	IOMap	*next;
	int		reserved;
	int	reserved;
	char	tag[13];
	ulong	start;
	ulong	end;


@@ 44,7 44,7 @@ static Rdwrfn *readfn[Qmax];
static Rdwrfn *writefn[Qmax];

static Dirtab archdir[Qmax] = {
	".",	{ Qdir, 0, QTDIR },	0,	0555,
	".",		{ Qdir, 0, QTDIR },	0,	0555,
	"ioalloc",	{ Qioalloc, 0 },	0,	0444,
	"iob",		{ Qiob, 0 },		0,	0660,
	"iow",		{ Qiow, 0 },		0,	0660,


@@ 52,7 52,7 @@ static Dirtab archdir[Qmax] = {
};
Lock archwlock;	/* the lock is only for changing archdir */
int narchdir = Qbase;
int (*_pcmspecial)(char *, ISAConf *);
int (*_pcmspecial)(char*, ISAConf*);
void (*_pcmspecialclose)(int);




@@ 109,7 109,7 @@ ioinit(void)
	// a dummy entry at 2^16
	ioalloc(0x10000, 1, 0, "dummy");
	ioalloc(0x0fff, 1, 0, "dummy");	// i82557 is at 0x1000, the dummy
							// entry is needed for swappable devs.
					// entry is needed for swappable devs.

	if ((excluded = getconf("ioexclude")) != nil) {
		char *s;


@@ 137,7 137,8 @@ ioinit(void)

}

// Reserve a range to be ioalloced later.  This is in particular useful for exchangable cards, such
// Reserve a range to be ioalloced later. 
// This is in particular useful for exchangable cards, such
// as pcmcia and cardbus cards.
int
ioreserve(int port, int size, int align, char *tag)


@@ 805,7 806,7 @@ archinit(void)
int
pcmspecial(char *idstr, ISAConf *isa)
{
	return (_pcmspecial  != nil)? _pcmspecial(idstr, isa): -1;
	return (_pcmspecial != nil)? _pcmspecial(idstr, isa): -1;
}

/*

M pc/devether.c => pc/devether.c +1 -1
@@ 328,7 328,7 @@ parseether(uchar *to, char *from)
	int i;

	p = from;
	for(i = 0; i < 6; i++){
	for(i = 0; i < Eaddrlen; i++){
		if(*p == 0)
			return -1;
		nip[0] = *p++;

M pc/fns.h => pc/fns.h +6 -7
@@ 2,7 2,6 @@

void	aamloop(int);
Dirtab*	addarchfile(char*, int, long(*)(Chan*,void*,long,vlong), long(*)(Chan*,void*,long,vlong));
//void	addscsilink(char*, Scsiio (*)(int, ISAConf*));
void	apicclkenable(void);
void	archinit(void);
void	bootargs(ulong);


@@ 59,7 58,7 @@ ushort	ins(int);
void	inss(int, void*, int);
ulong	inl(int);
void	insl(int, void*, int);
void intrdisable(int, void (*)(Ureg *, void *), void*, int, char*);
void	intrdisable(int, void (*)(Ureg *, void *), void*, int, char*);
void	intrenable(int, void (*)(Ureg*, void*), void*, int, char*);
void	iofree(int);
void	ioinit(void);


@@ 95,16 94,16 @@ void	outss(int, void*, int);
void	outl(int, ulong);
void	outsl(int, void*, int);
int	pciscan(int, Pcidev **);
ulong pcibarsize(Pcidev *, int);
ulong	pcibarsize(Pcidev *, int);
int	pcicfgr8(Pcidev*, int);
int	pcicfgr16(Pcidev*, int);
int	pcicfgr32(Pcidev*, int);
void	pcicfgw8(Pcidev*, int, int);
void	pcicfgw16(Pcidev*, int, int);
void	pcicfgw32(Pcidev*, int, int);
void pciclrbme(Pcidev*);
void	pciclrbme(Pcidev*);
void	pcihinv(Pcidev*);
uchar pciipin(Pcidev *, uchar);
uchar	pciipin(Pcidev *, uchar);
Pcidev* pcimatch(Pcidev*, int, int);
Pcidev* pcimatchtbdf(int);
void	pcireset(void);


@@ 113,9 112,9 @@ void	pcmcisread(PCMslot*);
int	pcmcistuple(int, int, int, void*, int);
PCMmap*	pcmmap(int, ulong, int, int);
int	pcmspecial(char*, ISAConf*);
int (*_pcmspecial)(char *, ISAConf *);
int	(*_pcmspecial)(char *, ISAConf *);
void	pcmspecialclose(int);
void (*_pcmspecialclose)(int);
void	(*_pcmspecialclose)(int);
void	pcmunmap(int, PCMmap*);
void	printcpufreq(void);
#define	procrestore(p)

M pc/i8253.c => pc/i8253.c +1 -1
@@ 210,7 210,7 @@ i8253timerset(uvlong next)
			period = MaxPeriod;
	}

	/* histeresis */
	/* hysteresis */
	if(i8253.period != period){
		ilock(&i8253);
		/* load new value */

M pc/kbd.c => pc/kbd.c +0 -1
@@ 469,4 469,3 @@ kbdenable(void)

	intrenable(IrqKBD, i8042intr, 0, BUSUNKNOWN, "kbd");
}


M pc/l.s => pc/l.s +0 -10
@@ 503,16 503,6 @@ TEXT gotolabel(SB), $0
	MOVL	$1, AX				/* return 1 */
	RET

TEXT swaplabel(SB), $0
	MOVL	label+0(FP), AX
	MOVL	pc+4(FP), BX
	MOVL	0(AX), SP			/* restore sp */
	MOVL	4(AX), CX			/* put return pc on the stack */
	MOVL	CX, 0(SP)
	MOVL	BX, 4(AX)			/* put caller pc where return pc was */
	MOVL	$1, AX				/* return 1 */
	RET

TEXT setlabel(SB), $0
	MOVL	label+0(FP), AX
	MOVL	SP, 0(AX)			/* store sp */

M pc/main.c => pc/main.c +2 -2
@@ 24,11 24,11 @@ Mach *m;
#define	MAXCONF		64

char bootdisk[KNAMELEN];
Conf	conf;
Conf conf;
char *confname[MAXCONF];
char *confval[MAXCONF];
int nconf;
uchar	*sp;	/* user stack of init proc */
uchar *sp;	/* user stack of init proc */


static void

M pc/memory.c => pc/memory.c +1 -14
@@ 266,19 266,6 @@ umbscan(void)
	}
}

int
touch(uchar *p, int n)
{
	int x;
	int i;

	x = 0;
	for(i=0; i<n; i++)
		x += p[i];
	return x;
}


static void
ramscan(ulong maxmem)
{


@@ 302,7 289,7 @@ ramscan(ulong maxmem)
	bda = (uchar*)KADDR(0x400);
	n = ((bda[0x14]<<8)|bda[0x13])*KB-x;
	mapfree(&rmapram, x, n);
	memset(KADDR(x), 0, n);		/* keep us honest */
	memset(KADDR(x), 0, n);			/* keep us honest */

	x = PADDR(PGROUND((ulong)end));
	pa = MemMinMB*MB;

M pc/sdata.c => pc/sdata.c +1 -1
@@ 834,7 834,7 @@ ataprobew(DevConf *cf)
	if (cf->nports != 2)
		error(Ebadarg);

	return ataprobe(cf->ports[0].port, cf->ports[1].port, cf->interrupt);
	return ataprobe(cf->ports[0].port, cf->ports[1].port, cf->intnum);
}

static int

M pc/wavelan.c => pc/wavelan.c +2 -2
@@ 1127,8 1127,8 @@ wavelanreset(Ether* ether, Ctlr *ctlr)
	ether->multicast = w_multicast;
	ether->arg = ether;

	DEBUG("#l%d: intnum %ld port %lx type %s",
		ether->ctlrno, ether->intnum, ether->port,	ether->type);
	DEBUG("#l%d: irq %ld port %lx type %s",
		ether->ctlrno, ether->irq, ether->port,	ether->type);
	DEBUG(" %2.2uX%2.2uX%2.2uX%2.2uX%2.2uX%2.2uX\n",
		ether->ea[0], ether->ea[1], ether->ea[2],
		ether->ea[3], ether->ea[4], ether->ea[5]);

M port/devsd.c => port/devsd.c +3 -3
@@ 1055,7 1055,7 @@ parse_irq(confdata_t* cd, char* option)
{
	char *e;

	cd->o_cf.interrupt = strtoul(option, &e, 0);
	cd->o_cf.intnum = strtoul(option, &e, 0);
	if(e == nil || *e != '\0')
		error(Ebadarg);
}


@@ 1123,7 1123,7 @@ sdwrite(Chan* c, void* a, long n, vlong off)

		if(cd.o_on){
			if(cd.o_spec == '\0' || cd.o_cf.nports == 0 || 
			     cd.o_cf.interrupt == 0 || cd.o_cf.type == nil)
			     cd.o_cf.intnum == 0 || cd.o_cf.type == nil)
				error(Ebadarg);
		}
		else{


@@ 1337,7 1337,7 @@ configure(char* spec, DevConf* cf)
		     in sdata and I'll move it later.  Really! */
		memset(&isa, 0, sizeof(isa));
		isa.port = cf->ports[0].port;
		isa.irq = cf->interrupt;
		isa.irq = cf->intnum;

		if(pcmspecial(p, &isa) < 0)
			error("Cannot find controller");