A alphapc/audio.h => alphapc/audio.h +16 -0
@@ 0,0 1,16 @@
+enum
+{
+ Bufsize = 16*1024, /* 92 ms each */
+ Nbuf = 16, /* 1.5 seconds total */
+ Dma = 1,
+ IrqAUDIO = 5,
+ SBswab = 0,
+};
+
+#define seteisadma(a, b) dmainit(a, Bufsize);
+#define CACHELINESZ 128
+#define UNCACHED(type, v) (type*)((ulong)(v))
+#define dcflush(a, b)
+
+#define Int0vec VectorPIC
+#define setvec(v, f, a) intrenable(v, f, a, BUSUNKNOWN)
M alphapc/devfloppy.c => alphapc/devfloppy.c +1 -0
@@ 842,6 842,7 @@ floppyxfer(FDrive *dp, int cmd, void *a, long off, long n)
*/
delay(10);
print("msr 0x%2.2uX\n", inb(Pmsr));
+xdmastatus(DMAchan);
floppywait();
dmaend(DMAchan);
poperror();
M alphapc/dma.c => alphapc/dma.c +33 -10
@@ 107,6 107,36 @@ outb(dp->mc, 0);
return 0;
}
+static void
+dmastatus(DMA *dp, int chan)
+{
+ int a, l, s;
+
+ ilock(dp);
+ outb(dp->cbp, 0);
+ a = inb(dp->addr[chan]);
+ a |= inb(dp->addr[chan])<<8;
+ a |= inb(dp->page[chan])<<16;
+ a |= inb(0x400|dp->page[chan])<<24;
+ outb(dp->cbp, 0);
+ l = inb(dp->count[chan]);
+ l |= inb(dp->count[chan])<<8;
+ s = inb(dp->cmd);
+ iunlock(dp);
+ print("addr %uX len %uX stat %uX\n", a, l, s);
+}
+
+void
+xdmastatus(int chan)
+{
+ DMA *dp;
+
+ dp = &dma[(chan>>2)&1];
+ chan = chan & 3;
+
+ dmastatus(dp, chan);
+}
+
/*
* setup a dma transfer. if the destination is not in kernel
* memory, allocate a page for the transfer.
@@ 174,11 204,12 @@ dmasetup(int chan, void *va, long len, int isread)
#ifdef tryPCI
outb(0x400|dp->page[chan], pa>>24);
#endif /* tryPCI */
+ outb(dp->cbp, 0); /* set count & address to their first byte */
outb(dp->count[chan], (len>>dp->shift)-1); /* set count */
outb(dp->count[chan], ((len>>dp->shift)-1)>>8);
outb(dp->sbm, chan); /* enable the channel */
iunlock(dp);
-//print("pa%lux+", pa);
+dmastatus(dp, chan);
return len;
}
@@ 210,6 241,7 @@ dmaend(int chan)
dp = &dma[(chan>>2)&1];
chan = chan & 3;
+dmastatus(dp, chan);
/*
* disable the channel
*/
@@ 217,15 249,6 @@ dmaend(int chan)
outb(dp->sbm, 4|chan);
iunlock(dp);
-{ int i;
-outb(dp->cbp, 0);
-i = inb(dp->addr[chan]);
-i |= inb(dp->addr[chan])<<8;
-i |= inb(dp->page[chan])<<16;
-i |= inb(0x400|dp->page[chan])<<24;
-//print("X%uX+", i);
-}
-
xp = &dp->x[chan];
if(xp->len == 0 || !xp->isread)
return;
M alphapc/fdc37c93x.c => alphapc/fdc37c93x.c +54 -0
@@ 5,3 5,57 @@
#include "fns.h"
#include "io.h"
+/*
+ * SMC FDC37C93x Plug and Play Compatible Ultra I/O Controller.
+ */
+enum { /* I/O Ports */
+ Config = 0x370, /* could also be 0x3F0 */
+
+ Index = 0,
+ Data = 1,
+};
+
+static int fddregs[] = {
+ 0x30,
+ 0x60, 0x61,
+ 0x70,
+ 0x74,
+ 0xF0,
+ 0xF1,
+ 0xF2,
+ 0xF4,
+ 0xF5,
+ 0,
+};
+
+void
+fdc37c93xdump(void)
+{
+ int config, i, x;
+
+ config = Config;
+
+ outb(config, 0x55);
+ outb(config, 0x55);
+
+ outb(config+Index, 0x20);
+ x = inb(config+Data);
+ print("fdc37c93x: Device ID 0x%2.2uX\n", x);
+
+ outb(config+Index, 0x07);
+ outb(config+Data, 0);
+ for(i = 0; fddregs[i]; i++){
+ outb(config+Index, fddregs[i]);
+ x = inb(config+Data);
+ print("FDD%2.2uX: 0x%2.2uX\n", fddregs[i], x);
+ }
+
+ outb(config, 0x70);
+ outb(config, 0x06);
+ outb(config, 0x74);
+ outb(config, 0x02);
+ outb(config, 0x30);
+ outb(config, 0x01);
+
+ outb(config, 0xAA);
+}
M alphapc/main.c => alphapc/main.c +2 -0
@@ 274,6 274,7 @@ char *confname[] =
{
"ether0",
"scsi0",
+ "audio0",
};
@@ 281,6 282,7 @@ char *confval[] =
{
"type=21140",
"type=aic7xxx",
+ "type=sb16",
};
int nconf = nelem(confname);
M carrera/audio.h => carrera/audio.h +1 -1
@@ 3,7 3,7 @@ enum
Bufsize = 16*1024, /* 92 ms each */
Nbuf = 16, /* 1.5 seconds total */
Dma = 6,
- Irq = 7,
+ IrqAUDIO = 7,
SBswab = 1,
M pc/audio.h => pc/audio.h +1 -0
@@ 3,6 3,7 @@ enum
Bufsize = 16*1024, /* 92 ms each */
Nbuf = 16, /* 1.5 seconds total */
Dma = 6,
+ IrqAUDIO = 7,
SBswab = 0,
};
M port/devaudio.c => port/devaudio.c +1 -1
@@ 711,7 711,7 @@ audioinit(void)
sbconf.port = 0x220;
sbconf.dma = Dma;
- sbconf.irq = 7;
+ sbconf.irq = IrqAUDIO;
if(isaconfig("audio", 0, &sbconf) == 0)
return;
if(cistrcmp(sbconf.type, "sb16") != 0 && cistrcmp(sbconf.type, "ess1688") != 0)