M carrera/dat.h => carrera/dat.h +1 -0
@@ 102,6 102,7 @@ struct Mach
Label sched; /* scheduler wakeup */
int lastpid; /* last pid allocated on this machine */
Proc* pidproc[NTLBPID]; /* proc that owns tlbpid on this mach */
+ ulong vaddrtst; /* address probe by tstbadvaddr */
Ureg* ur;
KMap* kactive; /* active on this machine */
int knext;
M carrera/faultmips.c => carrera/faultmips.c +2 -0
@@ 26,7 26,9 @@ tstbadvaddr(Ureg *ur, int read)
if(seg(up, iw, 0) == 0)
return 0;
+ m->vaddrtst = iw;
iw = *(ulong*)iw;
+ m->vaddrtst = 0;
/* print("iw: %lux\n", iw); /**/
M carrera/trap.c => carrera/trap.c +9 -0
@@ 172,6 172,15 @@ trap(Ureg *ur)
int user, cop, x, fpchk;
char buf[2*ERRLEN], buf1[ERRLEN], *fpexcep;
+ /*
+ * Retry failed probes of legal addresses from tstbadvaddr
+ * workaround for the R4400 >2.3
+ */
+ if(m->vaddrtst) {
+ m->vaddrtst = 0;
+ return;
+ }
+
ecode = (ur->cause>>2)&EXCMASK;
user = ur->status&KUSER;
M pc/devvga.c => pc/devvga.c +1 -1
@@ 608,7 608,7 @@ screenupdate(void)
switch(gscreen.ldepth){
case 0:
r.min.x &= ~15; /* 16 pixel alignment for l0update() */
- f = memmove;
+ f = l0update;
len = (r.max.x + 7)/8 - r.min.x/8;
if(len & 1)
len++; /* 16 bit alignment for l0update() */
M pc/l.s => pc/l.s +31 -0
@@ 618,6 618,37 @@ TEXT config(SB),$0
#define Smmask 0x02 /* map mask */
/*
+ * invert the ldepth 0 bitmap
+ */
+TEXT l0update(SB),$0
+ MOVL from+4(FP),SI
+ MOVL to+0(FP),DI
+ MOVL len+8(FP),BX
+
+ MOVL BX,CX
+ SHRL $2,CX
+ JZ l01
+l00:
+ MOVL -4(SI)(CX*4),AX
+ NOTL AX
+ MOVL AX,-4(DI)(CX*4)
+ LOOP l00
+l01:
+ MOVL BX,CX
+ ANDL $(~3),BX
+ ANDL $3,CX
+ JZ l03
+ ADDL BX,SI
+ ADDL BX,DI
+l02:
+ MOVB -1(SI)(CX*1),AL
+ NOTL AX
+ MOVB AL,-1(DI)(CX*1)
+ LOOP l02
+l03:
+ RET
+
+/*
* separate ldepth 1 bitmap into 2 bit planes
*/
TEXT l1update(SB),$0