From a2c994565b0286c8ea7785330639edffd8c6625d Mon Sep 17 00:00:00 2001 From: David du Colombier <0intro@gmail.com> Date: Thu, 22 May 1997 00:00:00 +0000 Subject: [PATCH] Plan 9 from Bell Labs 1997-05-22 --- ip/gre.c | 2 ++ ip/ip.c | 2 +- pc/devi82365.c | 3 ++- pc/main.c | 2 +- pc/memory.c | 70 ++++++++++++++++++++++++++++---------------------- pc/mp.c | 2 ++ 6 files changed, 48 insertions(+), 33 deletions(-) diff --git a/ip/gre.c b/ip/gre.c index e85bb04859521a5c6c1d89c0bbdf3f130b3ecac0..5621abf642d413c7d5ee5968c098711af688aa5d 100644 --- a/ip/gre.c +++ b/ip/gre.c @@ -158,6 +158,8 @@ grekick(Conv *c, int l) hnputl(ghp->dst, c->raddr); hnputl(ghp->src, c->laddr); hnputs(ghp->eproto, c->rport); + ghp->frag[0] = 0; + ghp->frag[1] = 0; ipoput(bp, 0, c->ttl); } diff --git a/ip/ip.c b/ip/ip.c index eede389789a154827274245b18f25cc329b9944b..cd0fd76ca74e7e290ad329465fc97c2da4184439 100644 --- a/ip/ip.c +++ b/ip/ip.c @@ -137,7 +137,7 @@ ipoput(Block *bp, int gating, int ttl) } if(eh->frag[0] & (IP_DF>>8)){ - netlog(Logip, "%I: eh->frag[0] & (IP_DF>>8)", eh->dst); + netlog(Logip, "%I: eh->frag[0] & (IP_DF>>8)\n", eh->dst); goto raise; } diff --git a/pc/devi82365.c b/pc/devi82365.c index 187f50a75393e4a3eee0b49aee8bf6b7247b5e25..8ecdacc38853111f7b3addd566821726aa285465 100644 --- a/pc/devi82365.c +++ b/pc/devi82365.c @@ -637,7 +637,8 @@ i82365reset(void) } /* for card management interrupts */ - intrenable(VectorPCMCIA, i82365intr, 0, BUSUNKNOWN); + if(ncontroller) + intrenable(VectorPCMCIA, i82365intr, 0, BUSUNKNOWN); } static Chan* diff --git a/pc/main.c b/pc/main.c index e87231867867d84b3fc462d35f500ae480a14651..30b22e739a63257e3dbd1953234b7c2605b73000 100644 --- a/pc/main.c +++ b/pc/main.c @@ -140,6 +140,7 @@ main(void) xinit(); trapinit(); printinit(); + cpuidprint(); if(isoldbcom) print(" ****OLD B.COM - UPGRADE****\n"); pageinit(); @@ -153,7 +154,6 @@ main(void) arch->clockenable(); procinit0(); initseg(); - cpuidprint(); links(); chandevreset(); swapinit(); diff --git a/pc/memory.c b/pc/memory.c index 4bd05a6ba44833a1d11627d9bcbebc8cf67d5eec..685ede8e6b6fe620b11c6778302a08588c89732c 100644 --- a/pc/memory.c +++ b/pc/memory.c @@ -235,6 +235,7 @@ umbscan(void) } } + static void ramscan(ulong maxmem) { @@ -258,6 +259,10 @@ ramscan(ulong maxmem) bda = (uchar*)(KZERO|0x400); mapfree(&rmapram, x, ((bda[0x14]<<8)|bda[0x13])*KB-x); + x = PADDR(PGROUND((ulong)end)); + pa = MemMinMB*MB; + mapfree(&rmapram, x, pa-x); + /* * Check if the extended memory size can be obtained from the CMOS. * If it's 0 then it's either not known or >= 64MB. Always check @@ -280,22 +285,17 @@ ramscan(ulong maxmem) maxpa = maxmem; /* - * March up memory from the end of the loaded kernel to maxpa - * a page at a time, mapping the page and checking the page can + * March up memory from MemMinMB to maxpa 1MB at a time, + * mapping the first page and checking the page can * be written and read correctly. The page tables are created here * on the fly, allocating from low memory as necessary. - * Nvalid must be initialised to include some UMB's to prevent the - * first 4MB being mapped with a 4MB page extension, it's already - * partly mapped. */ k0 = (ulong*)KZERO; kzero = *k0; map = 0; x = 0x12345678; memset(nvalid, 0, sizeof(nvalid)); - nvalid[MemUMB] = (0x100000-0xC8000)/BY2PG; - nvalid[MemRAM] = PADDR(PGROUND((ulong)end))/BY2PG - nvalid[MemUMB]; - for(pa = PADDR(PGROUND((ulong)end)); pa < maxpa; pa += BY2PG){ + while(pa < maxpa){ /* * Map the page. Use mapalloc(&rmapram, ...) to make * the page table if necessary, it will be returned to the @@ -319,30 +319,40 @@ ramscan(ulong maxmem) /* * Write a pattern to the page and write a different * pattern to a possible mirror at KZER0. If the data - * reads back correctly the page is some type of RAM (possibly + * reads back correctly the chunk is some type of RAM (possibly * a linearly-mapped VGA framebuffer, for instance...) and * can be cleared and added to the memory pool. If not, the - * page is marked invalid and added to the UMB or NOT pool - * depending on whether it is <16MB or not. + * chunk is marked uncached and added to the UMB pool if <16MB + * or is marked invalid and added to the UPA pool. */ *va = x; *k0 = ~x; if(*va == x){ - *pte &= ~PTEUNCACHED; - nvalid[MemRAM]++; - mapfree(&rmapram, pa, BY2PG); - memset(va, 0, BY2PG); + nvalid[MemRAM] += MB/BY2PG; + mapfree(&rmapram, pa, MB); + + do{ + *pte++ = pa|PTEWRITE|PTEVALID; + pa += BY2PG; + }while(pa % MB); + mmuflushtlb(PADDR(m->pdb)); + //memset(va, 0, MB); + } + else if(pa < 16*MB){ + nvalid[MemUMB] += MB/BY2PG; + mapfree(&rmapumb, pa, MB); + + do{ + *pte++ = pa|PTEWRITE|PTEUNCACHED|PTEVALID; + pa += BY2PG; + }while(pa % MB); } else{ - if(pa < 16*MB){ - nvalid[MemUMB]++; - mapfree(&rmapumb, pa, BY2PG); - } - else{ - *pte = 0; - nvalid[MemUPA]++; - mapfree(&rmapupa, pa, BY2PG); - } + nvalid[MemUPA] += MB/BY2PG; + mapfree(&rmapupa, pa, MB); + + *pte = 0; + pa += MB; } /* @@ -354,14 +364,14 @@ ramscan(ulong maxmem) * 4) mixed or no 4MB page extension - commit the already * initialised space for the page table. */ - if(((pa+BY2PG) % (4*MB)) == 0){ + if((pa % (4*MB)) == 0){ table = &((ulong*)m->pdb)[PDX(va)]; - if(nvalid[MemUPA] == 1024) + if(nvalid[MemUPA] == (4*MB)/BY2PG) *table = 0; - else if(nvalid[MemRAM] == 1024 && (m->cpuiddx & 0x08)) - *table = (pa & ~(4*MB-1))|PTESIZE|PTEWRITE|PTEVALID; - else if(nvalid[MemUMB] == 1024 && (m->cpuiddx & 0x08)) - *table = (pa & ~(4*MB-1))|PTESIZE|PTEWRITE|PTEUNCACHED|PTEVALID; + else if(nvalid[MemRAM] == (4*MB)/BY2PG && (m->cpuiddx & 0x08)) + *table = (pa - 4*MB)|PTESIZE|PTEWRITE|PTEVALID; + else if(nvalid[MemUMB] == (4*MB)/BY2PG && (m->cpuiddx & 0x08)) + *table = (pa - 4*MB)|PTESIZE|PTEWRITE|PTEUNCACHED|PTEVALID; else map = 0; } diff --git a/pc/mp.c b/pc/mp.c index d0498ec3b5584cc0950ab989b526a90854eb55ef..d4d200c58849eb4e5a457c601b00b041d758d1c6 100644 --- a/pc/mp.c +++ b/pc/mp.c @@ -207,6 +207,8 @@ mpintrinit(Bus* bus, PCMPintr* intr, int vector) break; case PcmpExtINT: +po = PcmpHIGH; +el = PcmpEDGE; v |= ApicExtINT; break; }