From a137053fb4373a1b282d8120537822784529fe46 Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Fri, 22 May 1998 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 1998-05-22

---
 pc/archgeneric.c  | 36 ++++++++++++++++++++++++++++++++++--
 pc/ether82557.c   | 10 ++++++----
 pc/vgacyber938x.c |  2 +-
 port/taslock.c    |  5 +++++
 port/xalloc.c     |  2 +-
 5 files changed, 47 insertions(+), 8 deletions(-)

diff --git a/pc/archgeneric.c b/pc/archgeneric.c
index f243ceadbc9799ee2624ae480fcbb99e893dc8ae..0ec0ae3b3e4451ffa3c8a3698ffee1f55fc1b080 100644
--- a/pc/archgeneric.c
+++ b/pc/archgeneric.c
@@ -41,7 +41,7 @@ typedef struct {
 	char*	name;
 } X86type;
 
-static X86type x86type[] =
+static X86type x86intel[] =
 {
 	{ 4,	0,	22,	"486DX", },	/* known chips */
 	{ 4,	1,	22,	"486DX50", },
@@ -70,6 +70,33 @@ static X86type x86type[] =
 	{ -1,	-1,	23,	"unknown", },	/* total default */
 };
 
+/*
+ * The AMD processors all implement the CPUID instruction.
+ * The later ones also return the processor name via functions
+ * 0x80000002, 0x80000003 and 0x80000004 in registers AX, BX, CX
+ * and DX:
+ *	K5	"AMD-K5(tm) Processor"
+ *	K6	"AMD-K6tm w/ multimedia extensions"
+ *	K6 3D	"AMD-K6(tm) 3D processor"
+ *	K6 3D+	?
+ */
+static X86type x86amd[] =
+{
+	{ 5,	0,	23,	"AMD-K5", },	/* guesswork */
+	{ 5,	1,	23,	"AMD-K5", },	/* guesswork */
+	{ 5,	2,	23,	"AMD-K5", },	/* guesswork */
+	{ 5,	3,	23,	"AMD-K5", },	/* guesswork */
+	{ 5,	6,	23,	"AMD-K6", },	/* guesswork */
+	{ 5,	7,	23,	"AMD-K6", },	/* guesswork */
+	{ 5,	8,	23,	"AMD-K6 3D", },	/* guesswork */
+	{ 5,	9,	23,	"AMD-K6 3D+", },/* guesswork */
+
+	{ 4,	-1,	22,	"Am486", },	/* guesswork */
+	{ 5,	-1,	23,	"AMD-K5/K6", },	/* guesswork */
+
+	{ -1,	-1,	23,	"unknown", },	/* total default */
+};
+
 void
 cpuidprint(void)
 {
@@ -93,13 +120,18 @@ cpuidentify(void)
 	vlong mct;
 
 	cpuid(m->cpuidid, &m->cpuidax, &m->cpuiddx);
+	if(strncmp(m->cpuidid, "AuthenticAMD", 12) == 0)
+		t = x86amd;
+	else
+		t = x86intel;
 	family = X86FAMILY(m->cpuidax);
 	model = X86MODEL(m->cpuidax);
-	for(t = x86type; t->name; t++){
+	while(t->name){
 		if((t->family == family && t->model == model)
 		|| (t->family == family && t->model == -1)
 		|| (t->family == -1))
 			break;
+		t++;
 	}
 	m->cpuidtype = t->name;
 	i8253init(t->aalcycles);
diff --git a/pc/ether82557.c b/pc/ether82557.c
index 88fb96b971a4bcb3a1553168a7aeacb6df2a774a..36e9c9287e798f6b0fcd74fda7a29a016b6082de 100644
--- a/pc/ether82557.c
+++ b/pc/ether82557.c
@@ -108,7 +108,7 @@ typedef struct Rfd {
 	ushort	count;
 	ushort	size;
 
-	uchar	data[sizeof(Etherpkt)];
+	uchar	data[1700];
 } Rfd;
 
 enum {					/* field */
@@ -485,6 +485,7 @@ txstart(Ether* ether)
 		}
 		cb->status = 0;
 
+		coherence();
 		ctlr->cbhead->command &= ~CbS;
 		ctlr->cbhead = cb;
 		ctlr->cbq++;
@@ -504,7 +505,7 @@ configure(Ether* ether, int promiscuous)
 	ilock(&ctlr->cblock);
 	if(promiscuous){
 		ctlr->configdata[6] |= 0x80;		/* Save Bad Frames */
-		ctlr->configdata[6] &= ~0x40;		/* !Discard Overrun Rx Frames */
+		//ctlr->configdata[6] &= ~0x40;		/* !Discard Overrun Rx Frames */
 		ctlr->configdata[7] &= ~0x01;		/* !Discard Short Rx Frames */
 		ctlr->configdata[15] |= 0x01;		/* Promiscuous mode */
 		ctlr->configdata[18] &= ~0x01;		/* (!Padding enable?), !stripping enable */
@@ -512,7 +513,7 @@ configure(Ether* ether, int promiscuous)
 	}
 	else{
 		ctlr->configdata[6] &= ~0x80;
-		ctlr->configdata[6] |= 0x40;
+		//ctlr->configdata[6] |= 0x40;
 		ctlr->configdata[7] |= 0x01;
 		ctlr->configdata[15] &= ~0x01;
 		ctlr->configdata[18] |= 0x01;		/* 0x03? */
@@ -592,7 +593,7 @@ interrupt(Ureg*, void* arg)
 				 * If not, just adjust the necessary fields for reuse.
 				 */
 				if((rfd->field & RfdOK) && (xbp = rfdalloc(rfd->link))){
-					bp->rp += sizeof(Rfd)-sizeof(Etherpkt);
+					bp->rp += sizeof(Rfd)-sizeof(rfd->data);
 					bp->wp = bp->rp + (rfd->count & 0x3FFF);
 
 					xbp->next = bp->next;
@@ -621,6 +622,7 @@ interrupt(Ureg*, void* arg)
 				ctlr->rfdtail->next = bp;
 				((Rfd*)ctlr->rfdtail->rp)->link = PADDR(bp->rp);
 				((Rfd*)ctlr->rfdtail->rp)->field |= RfdS;
+				coherence();
 				rfd->field &= ~RfdS;
 
 				/*
diff --git a/pc/vgacyber938x.c b/pc/vgacyber938x.c
index 57b453d77ed08f851f8a6b5099230ae1e181f7fc..00309ec1c7b35f1fba770ce3ad24eb68c84b94e1 100644
--- a/pc/vgacyber938x.c
+++ b/pc/vgacyber938x.c
@@ -108,7 +108,7 @@ cyber938xcurload(VGAscr* scr, Cursor* curs)
 	 * without a proper datasheet this is what binary search
 	 * through the display memory gives as the place for the
 	 * pattern.
-	 * Note also that is seems the cursor image offset (CRT44
+	 * Note also that it seems the cursor image offset (CRT44
 	 * and CRT45) cannot be set above 512KB.
 	 * This will do for now as the ThinkPad 560E has 1MB and
 	 * can only manage 800x600x8.
diff --git a/port/taslock.c b/port/taslock.c
index 275567a869f4aa06c78fca2cb13a704f29aebcad..b3f21e6fbc0102860a7fc456bee508d7e8cf4fac 100644
--- a/port/taslock.c
+++ b/port/taslock.c
@@ -68,6 +68,9 @@ ilock(Lock *l)
 		return;
 	}
 
+	if(conf.nmach < 2)
+		panic("ilock: no way out: pc %uX\n", pc);
+
 	for(;;){
 		splx(x);
 		while(l->key)
@@ -96,6 +99,8 @@ canlock(Lock *l)
 void
 unlock(Lock *l)
 {
+	if(l->key == 0)
+		print("unlock: not locked: pc %uX\n", getcallerpc(l));
 	l->pc = 0;
 	l->key = 0;
 	coherence();
diff --git a/port/xalloc.c b/port/xalloc.c
index 27ff5cb71ba0303f75901f4af74f8385462d2f38..272f1eb9eebe29dfd324e18dce4943c0240568e6 100644
--- a/port/xalloc.c
+++ b/port/xalloc.c
@@ -10,7 +10,7 @@ enum
 {
 	Chunk		= 64*1024,
 	Nhole		= 128,
-	Magichole	= 0xDeadBabe,
+	Magichole	= 0x484F4C45,			/* HOLE */
 };
 
 typedef struct Hole Hole;