M carrera/dat.h => carrera/dat.h +0 -1
@@ 139,7 139,6 @@ struct KMap
KMap* next;
KMap* konmach[MAXMACH];
Page* pg;
- char inuse; /* number of procs using kmap */
};
#define VA(k) ((k)->virt)
M carrera/devether.c => carrera/devether.c +11 -6
@@ 15,8 15,8 @@
#define SONICADDR ((Sonic*)Sonicbase)
-#define RD(rn) (delay(1), *(ulong*)((ulong)&SONICADDR->rn^4))
-#define WR(rn, v) (delay(1), *(ulong*)((ulong)&SONICADDR->rn^4) = (v))
+#define RD(rn) (delay(0), *(ulong*)((ulong)&SONICADDR->rn^4))
+#define WR(rn, v) (delay(0), *(ulong*)((ulong)&SONICADDR->rn^4) = (v))
#define ISquad(s) if((ulong)s & 0x7) panic("sonic: Quad alignment");
typedef struct Pbuf Pbuf;
@@ 74,8 74,8 @@ typedef struct
enum
{
- Nrb = 16, /* receive buffers */
- Ntb = 16, /* transmit buffers */
+ Nrb = 8, /* receive buffers */
+ Ntb = 8, /* transmit buffers */
};
enum
@@ 530,8 530,10 @@ etherintr(void)
status &= ~Hbl;
}
if(status & Br){
- print("sonic: bus retry occurred\n");
+ WR(cr, 0);
+ iprint("sonic: bus retry occurred\n");
status &= ~Br;
+ for(;;);
}
if(status & AllIntr)
@@ 560,9 562,10 @@ static void
initbufs(Ether *c)
{
int i;
- uchar *mem;
+ uchar *mem, *base;
mem = xspanalloc(64*1024, BY2PG, 0);
+ base = mem;
mem = CACHELINE(uchar, mem);
/*
@@ 595,6 598,8 @@ initbufs(Ether *c)
mem += sizeof(Pbuf);
mem = QUAD(uchar, mem);
}
+ if(mem >= base+64*1024)
+ panic("sonic init");
}
void
M carrera/l.s => carrera/l.s +11 -1
@@ 12,7 12,17 @@
#define CONST(x,r) MOVW $((x)&0xffff0000), r; OR $((x)&0xffff), r
-#define RDBGSV CONST(0x80020000, R26); MOVW R29, 0(R26); MOVW M(EPC), R27; MOVW R27, 4(R26); MOVW R31, 8(R26)
+#define RDBGSV CONST(0x80020000, R26); \
+ MOVW R29, 0(R26); \
+ MOVW M(EPC), R27; \
+ MOVW R27, 4(R26); \
+ MOVW R31, 8(R26); \
+ MOVW M(CAUSE), R27; \
+ MOVW R27, 12(R26); \
+ MOVW M(STATUS), R27; \
+ MOVW R27, 16(R26); \
+ MOVW M(BADVADDR), R27; \
+ MOVW R27, 20(R26)
/*
* R4000 instructions
M carrera/main.c => carrera/main.c +56 -14
@@ 37,8 37,9 @@ extern ulong rdbglen;
void
main(void)
{
- tlbinit(); /* Very early to establish IO mappings */
- ioinit(1);
+ rdbginit();
+ tlbinit();
+ ioinit(1); /* Very early to establish IO mappings */
arginit();
confinit();
savefpregs(&initfp);
@@ 62,6 63,7 @@ main(void)
schedinit();
}
+
/*
* copy arguments passed by the boot kernel (or ROM) into a temporary buffer.
* we do this because the arguments are in memory that may be allocated
@@ 398,10 400,15 @@ confinit(void)
conf.copymode = 0; /* copy on write */
}
+void
+procsave(Proc *p)
+{
+ USED(p);
-/*
- * for the sake of devcons
- */
+ /* keep track of tlbfaults */
+ up->counter[TLBCNTR] += m->tlbfault - m->otlbfault;
+ m->otlbfault = m->tlbfault;
+}
void
buzz(int f, int d)
@@ 410,18 417,53 @@ buzz(int f, int d)
USED(d);
}
-void
-rdbginit(void)
+/*
+ register offsets of ARCS prom jmpbuf
+ JB_PC 0
+ JB_SP 1
+ JB_FP 2
+ JB_S0 3
+ JB_S1 4
+ JB_S2 5
+ JB_S3 6
+ JB_S4 7
+ JB_S5 8
+ JB_S6 9
+ JB_S7 10
+*/
+
+struct
{
- memmove((void*)0xA001C000, rdbgcode, rdbglen);
-}
+ ulong pc;
+ ulong sp;
+ ulong fp;
+ ulong s[7];
+} Mipsjmpbuf;
void
-procsave(Proc *p)
+rdbginit(void)
{
- USED(p);
+ uchar *vec;
+ ulong jba;
- /* keep track of tlbfaults */
- up->counter[TLBCNTR] += m->tlbfault - m->otlbfault;
- m->otlbfault = m->tlbfault;
+ /* Only interested in the PC */
+ Mipsjmpbuf.pc = 0xA001C020;
+
+ /* Link an NMI handler to the debugger
+ * - addresses from the ARCS rom source
+ */
+ vec = (uchar*)0xA0000420;
+ jba = (ulong)UNCACHED(void, &Mipsjmpbuf);
+
+ vec[0] = 'N';
+ vec[1] = 'm';
+ vec[2] = 'i';
+ vec[3] = 's';
+ vec[4] = jba>>24;
+ vec[5] = jba>>16;
+ vec[6] = jba>>8;
+ vec[7] = jba;
+
+ /* Install the debugger code in a known place */
+ memmove((void*)0xA001C000, rdbgcode, rdbglen);
}
M carrera/trap.c => carrera/trap.c +0 -1
@@ 617,7 617,6 @@ forkchild(Proc *p, Ureg *ur)
memmove(cur, ur, sizeof(Ureg));
cur->pc += 4;
- cur->status |= CU0;
/* Things from bottom of syscall we never got to execute */
p->psstate = 0;
M pc/devvga.c => pc/devvga.c +4 -4
@@ 518,9 518,9 @@ setscreen(int maxx, int maxy, int ldepth)
}
/*
- * paste tile into soft screen.
- * tile is at location r, first pixel in *data. tl is length of scan line to insert,
- * l is amount to advance data after each scan line.
+ * paste tile into soft screen.
+ * tile is at location r, first pixel in *data. tl is length of scan line to insert,
+ * l is amount to advance data after each scan line.
*/
void
screenload(Rectangle r, uchar *data, int tl, int l)
@@ 588,7 588,7 @@ screenload(Rectangle r, uchar *data, int tl, int l)
}
/*
- * copy litte endian soft screen to big endian hard screen
+ * copy little endian soft screen to big endian hard screen
*/
void
screenupdate(void)
M port/chan.c => port/chan.c +9 -0
@@ 195,11 195,20 @@ mount(Chan *new, Chan *old, int flag, char *spec)
}
if(m == 0) {
+ /*
+ * nothing mounted here yet. create a mount
+ * head and add to the hash table.
+ */
m = smalloc(sizeof(Mhead));
m->from = old;
incref(old);
m->hash = *l;
*l = m;
+
+ /*
+ * if this is a union mount, add the old
+ * node to the mount chain.
+ */
if(order != MREPL)
m->mount = newmount(m, old, 0, 0);
}
M port/devcons.c => port/devcons.c +6 -0
@@ 212,6 212,12 @@ echo(Rune r, char *buf, int n)
case 'r':
exit(0);
break;
+case 'q':
+print("%lux\n", *(ulong*)0xe0000004);
+print("%lux\n", *(ulong*)0x80000420);
+print("%lux\n", *(ulong*)0x80000424);
+for(pid = 0; pid < 30; pid++)
+print(":%lux\n", ((ulong*)0xbfc00000)[pid]);
}
break;
case 3: