Plan 9 from Bell Labs 2001-03-28
1 files changed, 4 insertions(+), 3 deletions(-) M port/portclock.c
M port/portclock.c => port/portclock.c +4 -3
@@ 69,10 69,10 @@ portclock(Ureg *ur) unlock(&clock0lock); } m->inclockintr = 0; if(up == 0 || up->state != Running) if(up == 0 || up->state != Running){ m->inclockintr = 0; return; } if(anyready()) sched(); @@ 82,4 82,5 @@ portclock(Ureg *ur) (*(ulong*)(USTKTOP-BY2WD)) += TK2MS(1); segclock(ur->pc); } m->inclockintr = 0; }