M alphapc/devarch.c => alphapc/devarch.c +2 -2
@@ 55,8 55,8 @@ ioinit(void)
iomap.maps[i].next = nil;
iomap.free = iomap.maps;
- // a dummy entry at 2^16
- ioalloc(0x10000, 1, 0, "dummy");
+ // a dummy entry at 2^17
+ ioalloc(0x20000, 1, 0, "dummy");
}
static long cputyperead(char*, int, ulong);
M alphapc/mem.h => alphapc/mem.h +1 -1
@@ 30,7 30,7 @@
#define MS2HZ (1000/HZ)
#define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
#define TK2MS(t) ((t)*MS2HZ) /* ticks to milliseconds */
-#define MS2TK(t) ((t)/MS2HZ) /* milliseconds to ticks */
+#define MS2TK(t) (((t)*HZ+500)/1000) /* milliseconds to closest tick */
/*
* Magic registers
M alphapc/screen.c => alphapc/screen.c +1 -0
@@ 469,6 469,7 @@ int hwblank = 1;
int
hwdraw(Memdrawparam *par)
{
+ int m;
VGAscr *scr;
Memimage *dst, *src;
M carrera/mem.h => carrera/mem.h +1 -1
@@ 27,7 27,7 @@
#define MS2HZ (1000/HZ) /* millisec per clock tick */
#define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
#define TK2MS(t) ((t)*MS2HZ) /* ticks to milliseconds */
-#define MS2TK(t) ((t)/MS2HZ) /* milliseconds to ticks */
+#define MS2TK(t) (((t)*HZ+500)/1000) /* milliseconds to closest tick */
/*
* CP0 registers
M mpc/mem.h => mpc/mem.h +1 -1
@@ 32,7 32,7 @@
#define MS2HZ (1000/HZ) /* millisec per clock tick */
#define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
#define TK2MS(t) ((t)*MS2HZ) /* ticks to milliseconds */
-#define MS2TK(t) ((t)/MS2HZ) /* milliseconds to ticks */
+#define MS2TK(t) (((t)*HZ+500)/1000) /* milliseconds to closest tick */
/* Bit encodings for Machine State Register (MSR) */
#define MSR_POW (1<<18) /* Enable Power Management */
M port/devloopback.c => port/devloopback.c +1 -1
@@ 521,7 521,7 @@ loopbackwrite(Chan *c, void *va, long n, vlong off)
iunlock(link);
}else if(strcmp(cb->f[0], "limit") == 0){
if(cb->nf != 2)
- error("usage: droprate ofn");
+ error("usage: limit maxqsize");
ilock(link);
link->limit = strtol(cb->f[1], nil, 0);
qsetlimit(link->oq, link->limit);