M pc/mmu.c => pc/mmu.c +1 -1
@@ 53,7 53,7 @@ Tss tss;
#define D16SEGM(p) { 0xFFFF, (0x0<<16)|SEGP|SEGPL(p)|SEGDATA|SEGW }
#define E16SEGM(p) { 0xFFFF, (0x0<<16)|SEGP|SEGPL(p)|SEGEXEC|SEGR }
#define TSSSEGM(b,p) { ((b)<<16)|sizeof(Tss),\
- ((b)&0xFF000000)|(((b)<<16)&0xFF)|SEGTSS|SEGPL(p)|SEGP }
+ ((b)&0xFF000000)|(((b)>>16)&0xFF)|SEGTSS|SEGPL(p)|SEGP }
/*
* global descriptor table describing all segments
M ss/bbmalloc.c => ss/bbmalloc.c +5 -22
@@ 7,21 7,6 @@
/*
* Allocate memory for use in kernel bitblts.
- * The allocated memory must have a flushed instruction
- * cache, and the data cache must be flushed by bbdflush().
- * To avoid the need for frequent cache flushes, the memory
- * is allocated out of an arena, and the i-cache is only
- * flushed when it has to be reused. By returning an
- * address in non-cached space, the need for flushing the
- * d-cache is avoided.
- *
- * Currently, the only kernel users of bitblt are devbit,
- * print, and the cursor stuff in devbit. The cursor
- * can get drawn at clock interrupt time, so it might need
- * to bbmalloc while another bitblt is going on.
- *
- * This code will have to be interlocked if we ever get
- * a multiprocessor with a bitmapped display.
*/
/* a 0->3 bitblt can take 900 words */
@@ 48,10 33,6 @@ bbmalloc(int nbytes)
ans = bbcur;
bbcur = ans + nw;
splx(s);
-/*
- if(ans == bbarena)
- icflush(ans, sizeof(bbarena));
-*/
bblast = ans;
ans = (void *)ans;
return ans;
@@ 66,8 47,10 @@ bbfree(void *p, int n)
bbcur = (ulong *)(((char *)bblast) + n);
}
-void *
-bbdflush(void *p, int n)
+int
+bbonstack(void)
{
- return p;
+ if(u)
+ return 1;
+ return 0;
}