~kris/9p

9hist

735b5709a0ea1a62ca9f95abc01432736f858bbb — David du Colombier 32 years ago bbbbb65
Plan 9 from Bell Labs 1993-12-19
6 files changed, 30 insertions(+), 53 deletions(-)

M carrera/dat.h
M carrera/devether.c
M carrera/main.c
M carrera/mmu.c
M carrera/trap.c
M port/page.c
M carrera/dat.h => carrera/dat.h +1 -9
@@ 48,11 48,6 @@ struct Conf
	ulong	base1;		/* base of bank 1 */
	ulong	copymode;	/* 0 is copy on write, 1 is copy on reference */
	int	monitor;

	ulong	ipif;		/* Ip protocol interfaces */
	ulong	ip;		/* Ip conversations per interface */
	ulong	arp;		/* Arp table size */
	ulong	frag;		/* Ip fragment assemble queue size */
};

/*


@@ 101,15 96,12 @@ struct Mach
	int	tlbfault;		/* # of tlb faults FIFTH */
	int	tlbpurge;		/* MUST BE SIXTH */

	/* the following is safe to move */
	/* the following are safe to move */
	ulong	otlbfault;		/* tlbfault at last sched */
	ulong	ticks;			/* of the clock since boot time */
	Label	sched;			/* scheduler wakeup */
	Lock	alarmlock;		/* access to alarm list */
	void*	alarm;			/* alarms bound to this clock */
	int	lastpid;		/* last pid allocated on this machine */
	Proc*	pidproc[NTLBPID];	/* proc that owns tlbpid on this mach */
	Page*	ufreeme;		/* address of upage of exited process */
	Ureg*	ur;
	KMap*	kactive;		/* active on this machine */
	int	knext;

M carrera/devether.c => carrera/devether.c +4 -14
@@ 15,8 15,8 @@

#define SONICADDR	((Sonic*)Sonicbase)

#define RD(rn)		(sncdly(), *(ulong*)((ulong)&SONICADDR->rn^4))
#define WR(rn, v)	(sncdly(), *(ulong*)((ulong)&SONICADDR->rn^4) = (v))
#define RD(rn)		(delay(0), *(ulong*)((ulong)&SONICADDR->rn^4))
#define WR(rn, v)	(delay(0), *(ulong*)((ulong)&SONICADDR->rn^4) = (v))
#define ISquad(s)	if((ulong)s & 0x7) panic("sonic: Quad alignment");

typedef struct Pbuf Pbuf;


@@ 251,16 251,6 @@ Ether *ether[Nether];
void sonicswap(void*, int);

static void
sncdly(void)
{
	int i, j, *pj;

	pj = &j;
	for(i = 0; i < 200; i++)
		*pj++;
}

static void
wus(ushort *a, ushort v)
{
	a[0] = v;


@@ 458,12 448,13 @@ etherintr(void)
		if(status == 0)
			break;

		/* Clear the interrupt cause */
		WR(isr, status);
	
		/*
		 * Transmission complete, for good or bad.
		 */
		if(status & (Txdn|Txer)){
		if(status & (Txdn|Txer)) {
			txpkt = &c->tda[c->ti];
			while(txpkt->status != Host){
				if(txpkt->status == Interface){


@@ 621,7 612,6 @@ etherreset(void)
	 * Set the physical ethernet address and
	 * prime the interrupt handler.
	 */

	if(ether[0] == 0) {
		ctlr = malloc(sizeof(Ether));
		ether[0] = ctlr;

M carrera/main.c => carrera/main.c +0 -4
@@ 391,10 391,6 @@ confinit(void)
	conf.nproc = 100;
	conf.nswap = conf.npage*3;
	conf.nimage = 200;
	conf.ipif = 8;
	conf.ip = 64;
	conf.arp = 32;
	conf.frag = 32;

	conf.monitor = 1;


M carrera/mmu.c => carrera/mmu.c +2 -1
@@ 156,7 156,7 @@ kfault(Ureg *ur)
		panic("kmapfault: %lux", addr);

	k = &kpte[index];
	if(k->virt == 0)
	if(k->virt == 0 || k->ref < 1)
		panic("kmapfault: unmapped %lux", addr);

	for(f = m->kactive; f; f = f->konmach[mno])


@@ 211,6 211,7 @@ mmuswitch(Proc *p)
	tp = p->pidonmach[m->machno];
	if(tp == 0)
		tp = newtlbpid(p);

	puttlbx(0, KZERO|PTEPID(tp), 0, 0, PGSZ4K);
}


M carrera/trap.c => carrera/trap.c +23 -24
@@ 238,6 238,9 @@ trap(Ureg *ur)

	Default:
	default:
		((ulong*)0xA0020000)[7] = 0x87654321;
		((void(*)(void))0xA001C020)();

		if(user) {
			spllo();
			sprint(buf, "sys: %s", excname[ecode]);


@@ 278,36 281,32 @@ trap(Ureg *ur)
void
intr(Ureg *ur)
{
	uchar devint;
	static uchar devint;
	ulong cause = ur->cause;

	m->intr++;
	cause &= INTR7|INTR6|INTR5|INTR4|INTR3|INTR2|INTR1|INTR0;

	if(cause & INTR3) {
		for(;;) {
			devint = IO(uchar, Intcause);
			if(devint == 0)
				break;
			switch(devint) {
			default:
				panic("unknown devint=#%lux", devint);
			case 0x28:		/* Serial 1 */
				NS16552intr(0);
				break;
			case 0x24:		/* Serial 2 */
				NS16552intr(1);
				break;
			case 0x14:
				etherintr();
				break;
			case 0x1C:
				kbdintr();
				break;
			case 0x20:
				mouseintr();
				break;
			}
		devint = IO(uchar, Intcause);
		switch(devint) {
		default:
			panic("unknown devint=#%lux", devint);
		case 0x28:		/* Serial 1 */
			NS16552intr(0);
			break;
		case 0x24:		/* Serial 2 */
			NS16552intr(1);
			break;
		case 0x14:
			etherintr();
			break;
		case 0x1C:
			kbdintr();
			break;
		case 0x20:
			mouseintr();
			break;
		}
		cause &= ~INTR3;
	}

M port/page.c => port/page.c +0 -1
@@ 134,7 134,6 @@ print("! ");
	else
		palloc.tail = p->prev;


	palloc.freecount--;
	unlock(&palloc);