4 files changed, 95 insertions(+), 47 deletions(-)

M alphapc/devfloppy.c
M alphapc/dma.c
M alphapc/fdc37c93x.c
A alphapc/sio.c

@@ 39,7 39,7 @@ enum {
 };
 
 #define DPRINT if(floppydebug)print
-int floppydebug = 1;
+int floppydebug = 0;
 
 /*
  *  types of drive (from PC equipment byte)


@@ 106,7 106,8 @@ static void	floppywait(void);
 static long	floppyxfer(FDrive*, int, void*, long, long);
 
 Dirtab floppydir[]={
-	"fd0disk",		{Qdata + 0},	0,	0660,
+//	"fd0disk",		{Qdata + 0},	0,	0660,
+	"fd0disk",		{Qdata + 0},	0,	0666,
 	"fd0ctl",		{Qctl + 0},	0,	0660,
 	"fd1disk",		{Qdata + 1},	0,	0660,
 	"fd1ctl",		{Qctl + 1},	0,	0660,


@@ 535,7 536,6 @@ floppycmd(void)
 			microdelay(8);	/* for machine independence */
 		}
 		outb(Pfdata, fl.cmd[i]);
-microdelay(8);	/* for machine independence */
 	}
 	return 0;
 }


@@ 639,11 639,7 @@ cmddone(void *)
 static void
 floppywait(void)
 {
-vlong t0, t1;
-t0 = fastticks(nil);
 	tsleep(&fl.r, cmddone, 0, 5000);
-t1 = fastticks(nil);
-print("wait %lld ticks\n", t1-t0);
 	if(!cmddone(0)){
 		floppyintr(0);
 		fl.confused = 1;


@@ 688,6 684,26 @@ floppyrecal(FDrive *dp)
 }
 
 static void
+dumpreg(void)
+{
+	int i;
+
+	fl.ncmd = 0;
+	fl.cmd[fl.ncmd++] = Fdumpreg;
+	if(floppycmd() < 0)
+		return;
+	floppywait();
+	if(fl.nstat < 0){
+		print("dumpreg bad %d\n", fl.nstat);
+		fldump();
+		return;
+	}
+	for(i = 0; i < fl.nstat; i++)
+		print(" %2.2uX", fl.stat[i]);
+	print("\n");
+}
+
+static void
 specify(void)
 {
 	fl.ncmd = 0;


@@ 794,7 810,7 @@ floppyxfer(FDrive *dp, int cmd, void *a, long off, long n)
 	/* retry on error (until it gets ridiculous) */
 	tries = 0;
 	while(waserror()){
-		if(tries++ > 2/*0*/)
+		if(tries++ > 20)
 			nexterror();
 		DPRINT("floppyxfer: retrying\n");
 		/*floppyon(dp);*/


@@ 840,9 856,6 @@ floppyxfer(FDrive *dp, int cmd, void *a, long off, long n)
 	/*
 	 *  give bus to DMA, floppyintr() will read result
 	 */
-delay(10);
-print("msr 0x%2.2uX\n", inb(Pmsr));
-xdmastatus(DMAchan);
 	floppywait();
 	dmaend(DMAchan);
 	poperror();

@@ 3,7 3,6 @@
 #include	"mem.h"
 #include	"dat.h"
 #include	"fns.h"
-#include	"io.h"
 
 typedef struct DMAport	DMAport;
 typedef struct DMA	DMA;


@@ 63,6 62,25 @@ DMA dma[2] = {
 	 1 },
 };
 
+static void
+dmastatus(DMA *dp, int chan, char c)
+{
+	int a, l, s;
+
+	ilock(dp);
+	outb(dp->cbp, 0);
+	a = inb(dp->addr[chan]);
+	a |= inb(dp->addr[chan])<<8;
+	a |= inb(dp->page[chan])<<16;
+	a |= inb(0x400|dp->page[chan])<<24;
+	outb(dp->cbp, 0);
+	l = inb(dp->count[chan]);
+	l |= inb(dp->count[chan])<<8;
+	s = inb(dp->cmd);
+	iunlock(dp);
+	print("%c: addr %uX len %uX stat %uX\n", c, a, l, s);
+}
+
 /*
  *  DMA must be in the first 16MB.  This gets called early by the
  *  initialisation routines of any devices which require DMA to ensure


@@ 73,6 91,16 @@ dmainit(int chan, int maxtransfer)
 {
 	DMA *dp;
 	DMAxfer *xp;
+	static int once;
+
+	if(once == 0){
+		outb(dma[0].mc, 0);
+		outb(dma[1].mc, 0);
+		outb(dma[0].cmask, 0);
+		outb(dma[1].cmask, 0);
+		outb(dma[1].mode, 0xC0);
+		once = 1;
+	}
 
 	if(maxtransfer > 64*1024)
 		maxtransfer = 64*1024;


@@ 85,7 113,7 @@ dmainit(int chan, int maxtransfer)
 			return 1;
 		return 0;
 	}
-outb(dp->mc, 0);
+//dmastatus(dp, chan, 'I');
 
 	xp->bva = xspanalloc(maxtransfer, BY2PG, 64*1024);
 	if(xp->bva == nil)


@@ 107,25 135,6 @@ outb(dp->mc, 0);
 	return 0;
 }
 
-static void
-dmastatus(DMA *dp, int chan, char c)
-{
-	int a, l, s;
-
-	ilock(dp);
-	outb(dp->cbp, 0);
-	a = inb(dp->addr[chan]);
-	a |= inb(dp->addr[chan])<<8;
-	a |= inb(dp->page[chan])<<16;
-	a |= inb(0x400|dp->page[chan])<<24;
-	outb(dp->cbp, 0);
-	l = inb(dp->count[chan]);
-	l |= inb(dp->count[chan])<<8;
-	s = inb(dp->cmd);
-	iunlock(dp);
-	print("%c: addr %uX len %uX stat %uX\n", c, a, l, s);
-}
-
 void
 xdmastatus(int chan)
 {


@@ 159,6 168,9 @@ dmasetup(int chan, void *va, long len, int isread)
 	chan = chan & 3;
 //print("va%lux+", va);
 #define tryPCI
+#ifndef PCIWADDR
+#define PCIWADDR(va)	PADDR(va)
+#endif /* PCIWADDR */
 #ifdef notdef
 	xp = &dp->x[chan];
 


@@ 209,7 221,7 @@ dmasetup(int chan, void *va, long len, int isread)
 	outb(dp->count[chan], ((len>>dp->shift)-1)>>8);
 	outb(dp->sbm, chan);		/* enable the channel */
 	iunlock(dp);
-dmastatus(dp, chan, 'S');
+//dmastatus(dp, chan, 'S');
 
 	return len;
 }


@@ 241,7 253,7 @@ dmaend(int chan)
 	dp = &dma[(chan>>2)&1];
 	chan = chan & 3;
 
-dmastatus(dp, chan, 'E');
+//dmastatus(dp, chan, 'E');
 	/*
 	 *  disable the channel
 	 */

@@ 28,6 28,8 @@ static int fddregs[] = {
 	0,
 };
 
+#define OUTB(p, d)	outb(p, d); microdelay(10);
+
 void
 fdc37c93xdump(void)
 {


@@ 35,27 37,30 @@ fdc37c93xdump(void)
 
 	config = Config;
 
-	outb(config, 0x55);
-	outb(config, 0x55);
+	OUTB(config, 0x55);
+	OUTB(config, 0x55);
 
-	outb(config+Index, 0x20);
+	OUTB(config+Index, 0x20);
 	x = inb(config+Data);
 	print("fdc37c93x: Device ID 0x%2.2uX\n", x);
+	OUTB(config+Index, 0x22);
+	x = inb(config+Data);
+	print("fdc37c93x: Power/Control 0x%2.2uX\n", x);
 
-	outb(config+Index, 0x07);
-	outb(config+Data, 0);
+	OUTB(config+Index, 0x07);
+	OUTB(config+Data, 0);
 	for(i = 0; fddregs[i]; i++){
-		outb(config+Index, fddregs[i]);
+		OUTB(config+Index, fddregs[i]);
 		x = inb(config+Data);
 		print("FDD%2.2uX: 0x%2.2uX\n", fddregs[i], x);
 	}
 
-	outb(config, 0x70);
-	outb(config, 0x06);
-	outb(config, 0x74);
-	outb(config, 0x02);
-	outb(config, 0x30);
-	outb(config, 0x01);
+	OUTB(config+Index, 0x70);
+	OUTB(config+Data, 0x06);
+	OUTB(config+Index, 0x74);
+	OUTB(config+Data, 0x02);
+	OUTB(config+Index, 0x30);
+	OUTB(config+Data, 0x01);
 
-	outb(config, 0xAA);
+	OUTB(config, 0xAA);
 }

@@ 0,0 1,18 @@
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+
+/*
+ * 82378ZB Saturn-I/O (SIO) PCI-to-ISA Bus Bridge.
+ */
+static Pcidev* siodev;
+
+void
+siodump(void)
+{
+	if(siodev == nil && (siodev = pcimatch(nil, 0x8086, 0x0484)) == nil)
+		return;
+}