From 6d3629c6d3d6e0272e366420a98427d6f1e8669d Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Thu, 10 Jan 2002 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 2002-01-10

---
 boot/boot.c      | 10 +++---
 mtx/devether.c   |  2 +-
 mtx/ether2114x.c | 10 +++---
 mtx/io.h         |  2 +-
 mtx/main.c       | 85 ++++++++++++++++++++++++++++++++++++++++++------
 mtx/trap.c       |  3 --
 pc/devi82365.c   |  6 ++--
 pc/devpccard.c   |  2 +-
 8 files changed, 93 insertions(+), 27 deletions(-)

diff --git a/boot/boot.c b/boot/boot.c
index 497f42923194835c1f6968dc25094c659df3691d..844a589eb08d8d21bbe33311e26a394db455ca50 100644
--- a/boot/boot.c
+++ b/boot/boot.c
@@ -44,16 +44,18 @@ boot(int argc, char *argv[])
 	char buf[32];
 	AuthInfo *ai;
 
-	sleep(1000);
-
-
 	fmtinstall('r', rconv);
 
 	open("#c/cons", OREAD);
 	open("#c/cons", OWRITE);
 	open("#c/cons", OWRITE);
 	bind("#c", "/dev", MAFTER);
-	bind("#e", "/env", MREPL|MCREATE);
+	/*
+	 * init will reinitialize its namespace.
+	 * #ec gets us plan9.ini settings.
+	 */
+	bind("#ec", "/env", MREPL|MCREATE);
+	bind("#e", "/env", MAFTER);
 	bind("#s", "/srv", MREPL|MCREATE);
 
 #ifdef DEBUG
diff --git a/mtx/devether.c b/mtx/devether.c
index 437ed3b0d7cc47f9a602b82c76cdbabd93f74f5a..27f2c403f322e2c2cda77e2fbdb5c002799e05e3 100644
--- a/mtx/devether.c
+++ b/mtx/devether.c
@@ -377,7 +377,7 @@ etherreset(void)
 			 * controllers together. A device set to IRQ2 will appear on
 			 * the second interrupt controller as IRQ9.
 			 */
-			if(ether->irq == 2)
+			if(ether->irq == 2 && BUSTYPE(ether->tbdf) != BusPCI)
 				ether->irq = 9;
 			snprint(name, sizeof(name), "ether%d", ctlrno);
 
diff --git a/mtx/ether2114x.c b/mtx/ether2114x.c
index c788af956abc3c77632a95b0a97598ddb8076fe6..1fd6e25f41d32fe18a299ef034061085c5f7bb5a 100644
--- a/mtx/ether2114x.c
+++ b/mtx/ether2114x.c
@@ -19,7 +19,7 @@
 
 #include "etherif.h"
 
-#define DEBUG		(1)
+#define DEBUG		(0)
 #define debug		if(DEBUG)print
 
 enum {
@@ -56,7 +56,7 @@ enum {					/* CSR[57] - Status and Interrupt Enable */
 	Rwt		= 0x00000200,	/* Receive Watchdog Timeout */
 	Eti		= 0x00000400,	/* Early Transmit Interrupt */
 	Gte		= 0x00000800,	/* General purpose Timer Expired */
-	Fbe		= 0x00002000,	/* Fatal Bit Error */
+	Fbe		= 0x00002000,	/* Fatal Bus Error */
 	Ais		= 0x00008000,	/* Abnormal Interrupt Summary */
 	Nis		= 0x00010000,	/* Normal Interrupt Summary */
 	Rs		= 0x000E0000,	/* Receive process State (field) */
@@ -419,7 +419,6 @@ interrupt(Ureg*, void* arg)
 	Des *des;
 	Block *bp;
 
-print("ether intr\n");
 	ether = arg;
 	ctlr = ether->ctlr;
 
@@ -800,7 +799,7 @@ softreset(Ctlr* ctlr)
 	 */
 	csr32w(ctlr, 0, Swr);
 	microdelay(10);
-	csr32w(ctlr, 0, Rml|Cal16);
+	csr32w(ctlr, 0, Rml|Cal16|Dbo);
 	delay(1);
 }
 
@@ -1596,7 +1595,8 @@ reset(Ether* ether)
 
 	ether->ctlr = ctlr;
 	ether->port = ctlr->port;
-	ether->irq = ctlr->pcidev->intl;
+//	ether->irq = ctlr->pcidev->intl;
+ether->irq = 2;		/* arrrrrgh */
 	ether->tbdf = ctlr->pcidev->tbdf;
 
 	/*
diff --git a/mtx/io.h b/mtx/io.h
index 80a216c4a734b7f9ba94ad25c8096fae685546b6..74aa24e2ab90db1be5e0aaa90049bd5e52c0cbc6 100644
--- a/mtx/io.h
+++ b/mtx/io.h
@@ -180,5 +180,5 @@ typedef struct Pcidev {
 	ulong	pcr;
 };
 
-#define PCIWINDOW	0
+#define PCIWINDOW	0x80000000
 #define PCIWADDR(va)	(PADDR(va)+PCIWINDOW)
diff --git a/mtx/main.c b/mtx/main.c
index f90f318a3f68a966a0804e569dbf75f96c9d86bc..6e0442f54b885b14986b6a8795e1c70725b53261 100644
--- a/mtx/main.c
+++ b/mtx/main.c
@@ -260,11 +260,15 @@ procsave(Proc *p)
 void
 confinit(void)
 {
-	ulong pa;
+	char *p;
+	int userpcnt;
+	ulong pa, kpages;
 	extern ulong memsize;	/* passed in from ROM monitor */
 
-	conf.nmach = 1;		/* processors */
-	conf.nproc = 60;		/* processes */
+	if(p = getconf("*kernelpercent"))
+		userpcnt = 100 - strtol(p, 0, 0);
+	else
+		userpcnt = 0;
 
 	pa = PGROUND(PADDR(end));
 
@@ -276,15 +280,76 @@ confinit(void)
 
 	conf.npage = conf.npage0 + conf.npage1;
 
-	conf.upages = (conf.npage*60)/100;
-	conf.ialloc = ((conf.npage-conf.upages)/2)*BY2PG;
+	conf.nmach = 1;
+	conf.nproc = 100 + ((conf.npage*BY2PG)/MB)*5;
+	if(cpuserver)
+		conf.nproc *= 3;
+	if(conf.nproc > 2000)
+		conf.nproc = 2000;
+	conf.nimage = 200;
+	conf.nswap = conf.nproc*80;
+	conf.nswppo = 4096;
+	conf.copymode = 0;			/* copy on write */
+
+	if(cpuserver) {
+		if(userpcnt < 10)
+			userpcnt = 70;
+		kpages = conf.npage - (conf.npage*userpcnt)/100;
+
+		/*
+		 * Hack for the big boys. Only good while physmem < 4GB.
+		 * Give the kernel a max. of 16MB + enough to allocate the
+		 * page pool.
+		 * This is an overestimate as conf.upages < conf.npages.
+		 * The patch of nimage is a band-aid, scanning the whole
+		 * page list in imagereclaim just takes too long.
+		 */
+		if(kpages > (16*MB + conf.npage*sizeof(Page))/BY2PG){
+			kpages = (16*MB + conf.npage*sizeof(Page))/BY2PG;
+			conf.nimage = 2000;
+			kpages += (conf.nproc*KSTACK)/BY2PG;
+		}
+	} else {
+		if(userpcnt < 10) {
+			if(conf.npage*BY2PG < 16*MB)
+				userpcnt = 40;
+			else
+				userpcnt = 60;
+		}
+		kpages = conf.npage - (conf.npage*userpcnt)/100;
+
+		/*
+		 * Make sure terminals with low memory get at least
+		 * 4MB on the first Image chunk allocation.
+		 */
+		if(conf.npage*BY2PG < 16*MB)
+			imagmem->minarena = 4*1024*1024;
+	}
+	conf.upages = conf.npage - kpages;
+	conf.ialloc = (kpages/2)*BY2PG;
 
-	/* set up other configuration parameters */
-	conf.nswap = 0;
-	conf.nswppo = 0; 
-	conf.nimage = 20;
+	/*
+	 * Guess how much is taken by the large permanent
+	 * datastructures. Mntcache and Mntrpc are not accounted for
+	 * (probably ~300KB).
+	 */
+	kpages *= BY2PG;
+	kpages -= conf.upages*sizeof(Page)
+		+ conf.nproc*sizeof(Proc)
+		+ conf.nimage*sizeof(Image)
+		+ conf.nswap
+		+ conf.nswppo*sizeof(Page);
+	mainmem->maxsize = kpages;
+	if(!cpuserver){
+		/*
+		 * give terminals lots of image memory, too; the dynamic
+		 * allocation will balance the load properly, hopefully.
+		 * be careful with 32-bit overflow.
+		 */
+		imagmem->maxsize = kpages;
+	}
 
-	conf.copymode = 0;		/* copy on write */
+//	conf.monitor = 1;	/* BUG */
 }
 
 static int
diff --git a/mtx/trap.c b/mtx/trap.c
index 3dacd293a3dad8929bd98554cc80d9b883b6a782..ebc7270f2398c92da1b74401e966da71111b7c0f 100644
--- a/mtx/trap.c
+++ b/mtx/trap.c
@@ -24,7 +24,6 @@ hwintrenable(Vctl *v)
 
 	irq = v->irq;
 	if(BUSTYPE(v->tbdf) == BusPCI) {	/* MPIC? */
-print("add PCI intr %d\n", irq);
 		if(irq > 15) {
 			print("intrenable: pci irq %d out of range\n", v->irq);
 			return -1;
@@ -33,7 +32,6 @@ print("add PCI intr %d\n", irq);
 		mpicenable(vec, v);
 	}
 	else {
-print("add pic intr %d\n", irq);
 		if(irq > MaxIrqPIC) {
 			print("intrenable: irq %d out of range\n", v->irq);
 			return -1;
@@ -350,7 +348,6 @@ intr(Ureg *ureg)
 		vno = i8259intack();
 		mpiceoi(0);
 	}
-else print("non-pic %d\n", vno);
 
 	if(vno > nelem(vctl) || (ctl = vctl[vno]) == 0) {
 		panic("spurious intr %d", vno);
diff --git a/pc/devi82365.c b/pc/devi82365.c
index b863306ab36b5e1da931a659210d8d04ad9fef38..05850b6695551619b97283159c63bc8bbf2feb32 100644
--- a/pc/devi82365.c
+++ b/pc/devi82365.c
@@ -1007,9 +1007,11 @@ pcmio(int slotno, ISAConf *isa)
 		m = pcmmap(slotno, pp->caddr + Rconfig, 1, 1);
 		p = KADDR(m->isa + pp->caddr + Rconfig - m->ca);
 
-		/* set configuration and interrupt type */
+		/*  set configuration and interrupt type.
+		 *  if level is possible on the card, use it.
+		 */
 		x = ct->index;
-		if((ct->irqtype & 0x20) && ((ct->irqtype & 0x40)==0 || isa->irq>7))
+		if(ct->irqtype & 0x20)
 			x |= Clevel;
 		*p = x;
 		delay(5);
diff --git a/pc/devpccard.c b/pc/devpccard.c
index 75390afb8e4471101b9ac894fc8665d7941dfa43..cd99c1a79ae18fdd51c6d300cb560c817c93247a 100644
--- a/pc/devpccard.c
+++ b/pc/devpccard.c
@@ -1059,7 +1059,7 @@ pccard_pcmspecial(char *idstr, ISAConf *isa)
 
 		/* set configuration and interrupt type */
 		x = ct->index;
-		if((ct->irqtype & 0x20) && ((ct->irqtype & 0x40)==0 || isa->irq>7))
+		if(ct->irqtype & 0x20)
 			x |= Clevel;
 		*p = x;
 		delay(5);