From 6ba37625947ebc23ac2fa6ce0f8fb8e0e69171b2 Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Sun, 19 Jun 1994 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 1994-06-19

---
 carrera/dat.h       |   6 +-
 carrera/faultmips.c |  23 +----
 carrera/fns.h       |   1 +
 carrera/fptrap.c    |  21 +++--
 carrera/l.s         | 209 ++++++++++++++++++++------------------------
 carrera/main.c      |   3 +-
 carrera/mem.h       |  52 ++++++++++-
 carrera/trap.c      |  44 ++++++++--
 carrera/ureg.h      |  47 +---------
 port/sysproc.c      |   2 +-
 10 files changed, 202 insertions(+), 206 deletions(-)

diff --git a/carrera/dat.h b/carrera/dat.h
index eb9be43835cdb535700ee3c6f3cfb607fdbb393f..2dd1b7c607df9427d76b1afb3294e3008d9a19bf 100644
--- a/carrera/dat.h
+++ b/carrera/dat.h
@@ -15,8 +15,7 @@ typedef struct Ureg	Ureg;
 /*
  *  parameters for sysproc.c
  */
-#define AOUT_MAGIC	V_MAGIC
-
+#define AOUT_MAGIC	V_MAGIC || magic==M_MAGIC
 /*
  *  machine dependent definitions used by ../port/dat.h
  */
@@ -81,7 +80,8 @@ struct PMMU
 struct Notsave
 {
 	ulong	svstatus;
-	ulong	svr1;
+	long	svr1;
+	long	svhr1;
 };
 
 #include "../port/portdat.h"
diff --git a/carrera/faultmips.c b/carrera/faultmips.c
index 7e4e85f784adf61d7017b19832352d887fc5882d..cbf3dae219eb137a7499287caf5f81e10371dafd 100644
--- a/carrera/faultmips.c
+++ b/carrera/faultmips.c
@@ -81,25 +81,10 @@ tstbadvaddr(Ureg *ur, int read)
 		off |= ~0xffff;
 
 	rn = (iw>>21) & 0x1f;
-	switch(rn) {
-	case 0:
-		ea = off;
-		break;
-	case 31:
-		ea = ur->r31 + off;
-		break;
-	case 30:
-		ea = ur->r30 + off;
-		break;
-	case 29:
-		ea = ur->sp + off;
-		break;
-	default:
-		/* depends horribly on ureg.h */
-		ea = ((ulong*)&ur->r1)[1-rn];
-		ea += off;
-		break;
-	}
+	ea = *reg(ur, rn);
+	if(rn == 0)
+		ea = 0;
+	ea += off;
 
 	/* print("ea %lux 0x%lux(R%d) bv 0x%lux pc 0x%lux\n",
 		ea, off, rn, ur->badvaddr, ur->pc); /**/
diff --git a/carrera/fns.h b/carrera/fns.h
index 14f48a62d9e9c45da0e7551880c28bb11d1d4cae..53f663824514afb7a568bd477107e5df67e4e4c7 100644
--- a/carrera/fns.h
+++ b/carrera/fns.h
@@ -81,6 +81,7 @@ void*		pxspanalloc(ulong, int, ulong);
 void		rdbginit(void);
 ulong		rdcount(void);
 int		readlog(ulong, char*, ulong);
+long*		reg(Ureg*, int);
 void		restfpregs(FPsave*, ulong);
 void		screeninit(void);
 void		screenputs(char*, int);
diff --git a/carrera/fptrap.c b/carrera/fptrap.c
index bdf9ea7daff2e5270b5f3a4ddaa9a50ce8a2db18..83aade7aedeaf4d74bda3c1fb00ecba307da9814 100644
--- a/carrera/fptrap.c
+++ b/carrera/fptrap.c
@@ -34,10 +34,10 @@ fptrap(Ureg *ur)
 
 print("fpt: %d %s %lux\n", up->pid, up->text, up->fpsave.fpstatus);
 
+	iw = ur->pc;
 	if(ur->cause & (1<<31))
-		iw = *(ulong*)(ur->pc+4);
-	else
-		iw = *(ulong*)ur->pc;
+		iw += 4;
+	iw = *(ulong*)iw;
 
 	if(fpunimp(iw) == 0)
 		return;
@@ -174,17 +174,19 @@ fpunimp(ulong iw)
 	return 0;
 }
 
-static ulong*
+long*
 reg(Ureg *ur, int regno)
 {
 	/* regs go from R31 down in ureg, R29 is missing */
-	if(regno == 31)
+	switch(regno) {
+	case 31:
 		return &ur->r31;
-	if(regno == 30)
+	case 30:
 		return &ur->r30;
-	if(regno == 29)
+	case 29:
 		return &ur->sp;
-	return (&ur->r28) + (28-regno);
+	}
+	return (&ur->r28) + (28-regno)*(&ur->r27-&ur->r28);
 }
 
 static ulong
@@ -192,7 +194,8 @@ branch(Ureg *ur, ulong fcr31)
 {
 	ulong iw, npc, rs, rt, rd, offset;
 
-	iw = *(ulong*)ur->pc;
+	iw = ur->pc;
+	iw = *(ulong*)iw;
 	rs = (iw>>21) & 0x1F;
 	if(rs)
 		rs = *reg(ur, rs);
diff --git a/carrera/l.s b/carrera/l.s
index 7d56a4b510141c2d61355aedeb86a163892f9696..9eee59763a6b0fcffaf2ddb6c366a02c9f489667 100644
--- a/carrera/l.s
+++ b/carrera/l.s
@@ -12,30 +12,21 @@
 /*
  *  R4000 instructions
  */
-#define	LD(offset, base, rt)	WORD	$((067<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
-#define	STD(rt, offset, base)	WORD	$((077<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
-#define	DSLL(sa, rt, rd)	WORD	$(((rt)<<16)|((rd)<<11)|((sa)<<6)|070)
-#define	DSRA(sa, rt, rd)	WORD	$(((rt)<<16)|((rd)<<11)|((sa)<<6)|073)
 #define	LL(base, rt)		WORD	$((060<<26)|((base)<<21)|((rt)<<16))
 #define	SC(base, rt)		WORD	$((070<<26)|((base)<<21)|((rt)<<16))
 
-#define DBG(S)	CONST(0xa0001000, R20);CONST(S, R21);MOVW	R21,(R20)
-
 /*
  * Boot first processor
  */
 TEXT	start(SB), $-4
 
-DBG(0x55aa0000)
 	MOVW	$setR30(SB), R30
 	MOVW	$(CU1|INTR7|INTR6|INTR5|INTR4|INTR3|INTR2|INTR1|INTR0), R1
 	MOVW	R1, M(STATUS)
 	WAIT
-DBG(0x55aa0001)
 
 	MOVW	$TLBROFF, R1
 	MOVW	R1, M(WIRED)
-DBG(0x55aa0002)
 
 	MOVW	$((0x1C<<7)|(1<<24)), R1
 	MOVW	R1, FCR31	/* permit only inexact and underflow */
@@ -57,19 +48,14 @@ DBG(0x55aa0002)
 	MOVD	F24, F18
 	MOVD	F24, F20
 	MOVD	F24, F22
-DBG(0x55aa0003)
 
 	MOVW	$MACHADDR, R(MACH)
 	ADDU	$(BY2PG-4), R(MACH), SP
 	MOVW	$0, R(USER)
-DBG(0x55aa0010)
-MOVW R(MACH),4(R20)
 	MOVW	R0, 0(R(MACH))
-DBG(0x55aa0011)
 
 	MOVW	$edata(SB), R1
 	MOVW	$end(SB), R2
-DBG(0x55aa0004)
 
 clrbss:
 	MOVB	$0, (R1)
@@ -93,7 +79,7 @@ TEXT	touser(SB), $-4
 	MOVW	M(STATUS), R4
 	WAIT
 	AND	$(~KMODEMASK), R4
-	OR	$(KUSER|EXL|IE), R4
+	OR	$(KUSER|EXL|IE|UX), R4
 	MOVW	R4, M(STATUS)
 	WAIT
 	MOVW	R1, SP
@@ -384,14 +370,14 @@ wasuser:
 	MOVW	8(R27), R26		/* R26 = m->proc */
 	MOVW	8(R26), R27		/* R27 = m->proc->kstack */
 	MOVW	SP, R26			/* save user sp */
-	ADDU	$(KSTACK-UREGSIZE-2*BY2WD), R27, SP
+	ADDU	$(KSTACK-UREGSIZE), R27, SP
 
-	MOVW	R26, 0x10(SP)			/* user SP */
-	MOVW	R31, 0x28(SP)
-	MOVW	R30, 0x2C(SP)
+	MOVW	R26, Ureg_sp(SP)	/* user SP */
+	MOVV	R31, (Ureg_r31-4)(SP)
+	MOVV	R30, (Ureg_r30-4)(SP)
 	MOVW	M(CAUSE), R26
-	MOVW	R(MACH), 0x3C(SP)
-	MOVW	R(USER), 0x40(SP)
+	MOVV	R(MACH), (Ureg_r25-4)(SP)
+	MOVV	R(USER), (Ureg_r24-4)(SP)
 	AND	$(EXCMASK<<2), R26
 	SUBU	$(CSYS<<2), R26
 
@@ -407,13 +393,13 @@ wasuser:
 	JAL	syscall(SB)
 
 sysrestore:
-	MOVW	0x28(SP), R31
-	MOVW	0x08(SP), R26
-	MOVW	0x2C(SP), R30
+	MOVV	(Ureg_r31-4)(SP), R31
+	MOVW	Ureg_status(SP), R26
+	MOVV	(Ureg_r30-4)(SP), R30
 	MOVW	R26, M(STATUS)
 	WAIT
-	MOVW	0x0C(SP), R26		/* old pc */
-	MOVW	0x10(SP), SP
+	MOVW	Ureg_pc(SP), R26		/* old pc */
+	MOVW	Ureg_sp(SP), SP
 	MOVW	R26, M(EPC)
 	ERET
 
@@ -421,25 +407,28 @@ notsys:
 	JAL	trap(SB)
 restore:
 	JAL	restregs(SB)
-	MOVW	0x28(SP), R31
-	MOVW	0x2C(SP), R30
-	MOVW	0x3C(SP), R(MACH)
-	MOVW	0x40(SP), R(USER)
-	MOVW	0x10(SP), SP
+	MOVV	(Ureg_r31-4)(SP), R31
+	MOVV	(Ureg_r30-4)(SP), R30
+	MOVV	(Ureg_r25-4)(SP), R(MACH)
+	MOVV	(Ureg_r24-4)(SP), R(USER)
+	MOVW	Ureg_sp(SP), SP
 	MOVW	R26, M(EPC)
 	ERET
 
 waskernel:
-	MOVW	$1, R26			/* not syscall */
-	MOVW	SP, -(UREGSIZE-16)(SP)
+	MOVW	SP, R26
 	SUBU	$UREGSIZE, SP
-	MOVW	R31, 0x28(SP)
+	OR	$7, SP
+	XOR	$7, SP
+	MOVW	R26, Ureg_sp(SP)
+	MOVV	R31, (Ureg_r31-4)(SP)
+	MOVW	$1, R26			/* not syscall */
 	JAL	saveregs(SB)
 	MOVW	4(SP), R1		/* first arg for trap */
 	JAL	trap(SB)
 	JAL	restregs(SB)
-	MOVW	0x28(SP), R31
-	ADDU	$UREGSIZE, SP
+	MOVV	(Ureg_r31-4)(SP), R31
+	MOVW	Ureg_sp(SP), SP
 	MOVW	R26, M(EPC)
 	ERET
 
@@ -448,21 +437,19 @@ TEXT	forkret(SB), $0
 	JMP	sysrestore
 
 TEXT	saveregs(SB), $-4
-	MOVW	R1, 0x9C(SP)
-	MOVW	R2, 0x98(SP)
-	/* save R5, R6 as 64 bits */
-	ADDU	$(UREGSIZE-16), SP, R1
-	MOVW	$~7, R2			/* don't let him use R28 */
-	AND		R2, R1
-	STD		(5, 0,(1))
-	STD		(6, 8,(1))
-	ADDU	$8, SP, R1
-	MOVW	R1, 0x04(SP)		/* arg to base of regs */
+	MOVV	R1, (Ureg_r1-4)(SP)
+	MOVV	R2, (Ureg_r2-4)(SP)
+
+	MOVV	R6, (Ureg_r6-4)(SP)
+	MOVV	R5, (Ureg_r5-4)(SP)
+
+	ADDU	$Uoffset, SP, R1
+	MOVW	R1, 4(SP)		/* arg to base of regs */
 	MOVW	M(STATUS), R1
 	MOVW	M(EPC), R2
 	WAIT
-	MOVW	R1, 0x08(SP)
-	MOVW	R2, 0x0C(SP)
+	MOVW	R1, Ureg_status(SP)
+	MOVW	R2, Ureg_pc(SP)
 
 	MOVW	$(~KMODEMASK),R2	/* don't let him use R28 */
 	AND	R2, R1
@@ -473,88 +460,78 @@ TEXT	saveregs(SB), $-4
 	MOVW	M(CAUSE), R1
 	MOVW	M(BADVADDR), R2
 	NOOP
-	MOVW	R1, 0x14(SP)
+	MOVW	R1, Ureg_cause(SP)
 	MOVW	M(TLBVIRT), R1
 	NOOP
-	MOVW	R2, 0x18(SP)
-	MOVW	R1, 0x1C(SP)
-	MOVW	HI, R1
-	MOVW	LO, R2
-	MOVW	R1, 0x20(SP)
-	MOVW	R2, 0x24(SP)
+	MOVW	R2, Ureg_badvaddr(SP)
+	MOVW	R1, Ureg_tlbvirt(SP)
+	MOVV	HI, R1
+	MOVV	LO, R2
+	MOVV	R1, (Ureg_hi-4)(SP)
+	MOVV	R2, (Ureg_lo-4)(SP)
 					/* LINK,SB,SP missing */
-	MOVW	R28, 0x30(SP)
+	MOVV	R28, (Ureg_r28-4)(SP)
 					/* R27, R26 not saved */
 					/* R25, R24 missing */
-	MOVW	R23, 0x44(SP)
-	MOVW	R22, 0x48(SP)
-	MOVW	R21, 0x4C(SP)
-	MOVW	R20, 0x50(SP)
-	MOVW	R19, 0x54(SP)
-	MOVW	R18, 0x58(SP)
-	MOVW	R17, 0x5C(SP)
-	MOVW	R16, 0x60(SP)
-	MOVW	R15, 0x64(SP)
-	MOVW	R14, 0x68(SP)
-	MOVW	R13, 0x6C(SP)
-	MOVW	R12, 0x70(SP)
-	MOVW	R11, 0x74(SP)
-	MOVW	R10, 0x78(SP)
-	MOVW	R9, 0x7C(SP)
-	MOVW	R8, 0x80(SP)
-	MOVW	R7, 0x84(SP)
-	MOVW	R6, 0x88(SP)
-	MOVW	R5, 0x8C(SP)
-	MOVW	R4, 0x90(SP)
-	MOVW	R3, 0x94(SP)
+	MOVV	R23, (Ureg_r23-4)(SP)
+	MOVV	R22, (Ureg_r22-4)(SP)
+	MOVV	R21, (Ureg_r21-4)(SP)
+	MOVV	R20, (Ureg_r20-4)(SP)
+	MOVV	R19, (Ureg_r19-4)(SP)
+	MOVV	R18, (Ureg_r18-4)(SP)
+	MOVV	R17, (Ureg_r17-4)(SP)
+	MOVV	R16, (Ureg_r16-4)(SP)
+	MOVV	R15, (Ureg_r15-4)(SP)
+	MOVV	R14, (Ureg_r14-4)(SP)
+	MOVV	R13, (Ureg_r13-4)(SP)
+	MOVV	R12, (Ureg_r12-4)(SP)
+	MOVV	R11, (Ureg_r11-4)(SP)
+	MOVV	R10, (Ureg_r10-4)(SP)
+	MOVV	R9, (Ureg_r9-4)(SP)
+	MOVV	R8, (Ureg_r8-4)(SP)
+	MOVV	R7, (Ureg_r7-4)(SP)
+	MOVV	R4, (Ureg_r4-4)(SP)
+	MOVV	R3, (Ureg_r3-4)(SP)
 return:
 	RET
 
 TEXT	restregs(SB), $-4
 					/* LINK,SB,SP missing */
-	MOVW	0x30(SP), R28
+	MOVV	(Ureg_r28-4)(SP), R28
 					/* R27, R26 not saved */
 					/* R25, R24 missing */
-	MOVW	0x44(SP), R23
-	MOVW	0x48(SP), R22
-	MOVW	0x4C(SP), R21
-	MOVW	0x50(SP), R20
-	MOVW	0x54(SP), R19
-	MOVW	0x58(SP), R18
-	MOVW	0x5C(SP), R17
-	MOVW	0x60(SP), R16
-	MOVW	0x64(SP), R15
-	MOVW	0x68(SP), R14
-	MOVW	0x6C(SP), R13
-	MOVW	0x70(SP), R12
-	MOVW	0x74(SP), R11
-	MOVW	0x78(SP), R10
-	MOVW	0x7C(SP), R9
-	MOVW	0x80(SP), R8
-	MOVW	0x84(SP), R7
-	/*
-	 * restored below
-	 * MOVW	0x88(SP), R6
-	 * MOVW	0x8C(SP), R5
-	 */
-	MOVW	0x90(SP), R4
-	MOVW	0x94(SP), R3
-	MOVW	0x24(SP), R2
-	MOVW	0x20(SP), R1
-	MOVW	R2, LO
-	MOVW	R1, HI
-	/* restore 64-bit R5, R6 */
-	ADDU	$(UREGSIZE-16), SP, R1
-	MOVW	$~7, R2			/* don't let him use R28 */
-	AND		R2, R1
-	LD		(0,(1), 5)
-	LD		(8,(1), 6)
-	MOVW	0x08(SP), R1
-	MOVW	0x98(SP), R2
+	MOVV	(Ureg_r23-4)(SP), R23
+	MOVV	(Ureg_r22-4)(SP), R22
+	MOVV	(Ureg_r21-4)(SP), R21
+	MOVV	(Ureg_r20-4)(SP), R20
+	MOVV	(Ureg_r19-4)(SP), R19
+	MOVV	(Ureg_r18-4)(SP), R18
+	MOVV	(Ureg_r17-4)(SP), R17
+	MOVV	(Ureg_r16-4)(SP), R16
+	MOVV	(Ureg_r15-4)(SP), R15
+	MOVV	(Ureg_r14-4)(SP), R14
+	MOVV	(Ureg_r13-4)(SP), R13
+	MOVV	(Ureg_r12-4)(SP), R12
+	MOVV	(Ureg_r11-4)(SP), R11
+	MOVV	(Ureg_r10-4)(SP), R10
+	MOVV	(Ureg_r9-4)(SP), R9
+	MOVV	(Ureg_r8-4)(SP), R8
+	MOVV	(Ureg_r7-4)(SP), R7
+	MOVV	(Ureg_r6-4)(SP), R6
+	MOVV	(Ureg_r5-4)(SP), R5
+	MOVV	(Ureg_r4-4)(SP), R4
+	MOVV	(Ureg_r3-4)(SP), R3
+	MOVV	(Ureg_lo-4)(SP), R2
+	MOVV	(Ureg_hi-4)(SP), R1
+	MOVV	R2, LO
+	MOVV	R1, HI
+
+	MOVW	Ureg_status(SP), R1
+	MOVV	(Ureg_r2-4)(SP), R2
 	MOVW	R1, M(STATUS)
 	WAIT
-	MOVW	0x9C(SP), R1
-	MOVW	0x0C(SP), R26		/* old pc */
+	MOVV	(Ureg_r1-4)(SP), R1	/* BOTCH */
+	MOVW	Ureg_pc(SP), R26
 	RET
 
 TEXT	rfnote(SB), $0
diff --git a/carrera/main.c b/carrera/main.c
index 007868ef984818d32aac5b6c16433f3bf136247a..b180d7410b8cf325f727fa7eed6b1812ab2307fd 100644
--- a/carrera/main.c
+++ b/carrera/main.c
@@ -310,7 +310,8 @@ iomapinit(void)
 void
 vecinit(void)
 {
-	memmove((ulong*)UTLBMISS, (ulong*)vector0, 0x100);
+	memmove((ulong*)UTLBMISS, (ulong*)vector0, 0x80);
+	memmove((ulong*)XEXCEPTION, (ulong*)vector0, 0x80);
 	memmove((ulong*)CACHETRAP, (ulong*)vector100, 0x80);
 	memmove((ulong*)EXCEPTION, (ulong*)vector180, 0x80);
 
diff --git a/carrera/mem.h b/carrera/mem.h
index b5b062b4c672e6aee21e420720958bcf82206555..ff79914f3a8a7bc5e98544f20162446066758800 100644
--- a/carrera/mem.h
+++ b/carrera/mem.h
@@ -66,6 +66,7 @@
 #define ERL		0x00000004
 #define KSUPER		0x00000008
 #define KUSER		0x00000010
+#define UX		0x00000020
 #define INTMASK		0x0000ff00
 #define INTR0		0x00000100
 #define INTR1		0x00000200
@@ -84,7 +85,7 @@
  * Trap vectors
  */
 #define	UTLBMISS	(KSEG0+0x000)
-#define	XEXCEPTION	(KSEG0+0x80)
+#define	XEXCEPTION	(KSEG0+0x080)
 #define	CACHETRAP	(KSEG0+0x100)
 #define	EXCEPTION	(KSEG0+0x180)
 
@@ -98,10 +99,55 @@
  * Fundamental addresses
  */
 #define	MACHADDR	(KTZERO-MAXMACH*BY2PG)	/* warning: rdbg is near here */
-/* Sizeof(Ureg)+R5,R6+16 bytes slop+retpc & ur */
-#define	UREGSIZE	0xC0		
 #define	MACHP(n)	((Mach *)(MACHADDR+(n)*BY2PG))
 
+/*
+ * offsets in ureg.h for l.s
+ */
+#define	Ureg_status	(Uoffset+0)
+#define	Ureg_pc		(Uoffset+4)
+#define	Ureg_sp		(Uoffset+8)
+#define	Ureg_cause	(Uoffset+12)
+#define	Ureg_badvaddr	(Uoffset+16)
+#define	Ureg_tlbvirt	(Uoffset+20)
+
+#define	Ureg_hi		(Uoffset+28)
+#define	Ureg_lo		(Uoffset+36)
+#define	Ureg_r31	(Uoffset+44)
+#define	Ureg_r30	(Uoffset+52)
+#define	Ureg_r28	(Uoffset+60)
+#define	Ureg_r27	(Uoffset+68)
+#define	Ureg_r26	(Uoffset+76)
+#define	Ureg_r25	(Uoffset+84)
+#define	Ureg_r24	(Uoffset+92)
+#define	Ureg_r23	(Uoffset+100)
+#define	Ureg_r22	(Uoffset+108)
+#define	Ureg_r21	(Uoffset+116)
+#define	Ureg_r20	(Uoffset+124)
+#define	Ureg_r19	(Uoffset+132)
+#define	Ureg_r18	(Uoffset+140)
+#define	Ureg_r17	(Uoffset+148)
+#define	Ureg_r16	(Uoffset+156)
+#define	Ureg_r15	(Uoffset+164)
+#define	Ureg_r14	(Uoffset+172)
+#define	Ureg_r13	(Uoffset+180)
+#define	Ureg_r12	(Uoffset+188)
+#define	Ureg_r11	(Uoffset+196)
+#define	Ureg_r10	(Uoffset+204)
+#define	Ureg_r9		(Uoffset+212)
+#define	Ureg_r8		(Uoffset+220)
+#define	Ureg_r7		(Uoffset+228)
+#define	Ureg_r6		(Uoffset+236)
+#define	Ureg_r5		(Uoffset+244)
+#define	Ureg_r4		(Uoffset+252)
+#define	Ureg_r3		(Uoffset+260)
+#define	Ureg_r2		(Uoffset+268)
+#define	Ureg_r1		(Uoffset+276)
+
+/* Sizeof(Ureg) + (R5,R6) + 16 bytes slop + retpc + ur */
+#define	UREGSIZE	((Ureg_r1+4-Uoffset) + 16 + 16 + 4 + 4)
+#define	Uoffset		8
+
 /*
  * MMU
  */
diff --git a/carrera/trap.c b/carrera/trap.c
index a79f4e013621e7b50c49e1108835a15222e67451..04484b9b7b3ece3c684afd4dc865c527cdbc45aa 100644
--- a/carrera/trap.c
+++ b/carrera/trap.c
@@ -283,6 +283,14 @@ trap(Ureg *ur)
 	}
 }
 
+struct
+{
+	ulong cause;
+	ulong devint3;
+	ulong devint4;
+	ulong state;
+}sisr;
+
 void
 intr(Ureg *ur)
 {
@@ -292,9 +300,11 @@ intr(Ureg *ur)
 
 	m->intr++;
 	cause &= INTR7|INTR6|INTR5|INTR4|INTR3|INTR2|INTR1|INTR0;
-
+sisr.cause = cause;
 	if(cause & INTR3) {
 		devint = IO(uchar, Intcause);
+sisr.devint3 = devint;
+sisr.state = 0;
 		switch(devint) {
 		default:
 			panic("unknown devint=#%lux", devint);
@@ -318,9 +328,11 @@ intr(Ureg *ur)
 			break;
 		}
 		cause &= ~INTR3;
+sisr.state = 1;
 	}
 
 	if(cause & INTR2) {
+sisr.state = 2;
 		isr = IO(ulong, R4030Isr);
 		if(isr) {
 			iprint("R4030 Interrupt\n");
@@ -330,12 +342,14 @@ intr(Ureg *ur)
 			iprint(" MFA #%lux\n", IO(ulong, R4030Mfa));
 		}
 		cause &= ~INTR2;
+sisr.state = 3;
 	}
 
 	if(cause & INTR4) {
 		devint = IO(uchar, I386ack);
 		vec = devint&~0x7;
-
+sisr.devint4 = devint;
+sisr.state = 4;
 		/* reenable the 8259 interrupt */
 		if(vec == Int0vec || vec == Int1vec){
 			EISAOUTB(Int0ctl, EOI);
@@ -348,13 +362,18 @@ intr(Ureg *ur)
 			iprint("i386ACK #%lux\n", devint);
 			break;
 		case 7:
+sisr.state = 5;
 			audiosbintr();
+sisr.state = 6;
 			break;
 		case 13:
+sisr.state = 7;
 			audiodmaintr();
+sisr.state = 8;
 			break;
 		}
 		cause &= ~INTR4;
+sisr.state = 9;
 	}
 
 	if(cause & INTR7) {
@@ -490,10 +509,11 @@ notify(Ureg *ur)
 		pexit(n->msg, n->flag!=NDebug);
 	}
 	up->svstatus = ur->status;
-	sp = ur->usp - sizeof(Ureg);
+	sp = ur->usp & ~(BY2V-1);
+	sp -= sizeof(Ureg);
 
-	if(sp&0x3 || !okaddr((ulong)up->notify, BY2WD, 0)
-	|| !okaddr(sp-ERRLEN-3*BY2WD, sizeof(Ureg)+ERRLEN-3*BY2WD, 1)) {
+	if(!okaddr((ulong)up->notify, BY2WD, 0) ||
+	   !okaddr(sp-ERRLEN-3*BY2WD, sizeof(Ureg)+ERRLEN-3*BY2WD, 1)) {
 		pprint("suicide: bad address or sp in notify\n");
 		qunlock(&up->debug);
 		pexit("Suicide", 0);
@@ -506,9 +526,13 @@ notify(Ureg *ur)
 	sp -= 3*BY2WD;
 	*(ulong*)(sp+2*BY2WD) = sp+3*BY2WD;	/* arg 2 is string */
 	up->svr1 = ur->r1;			/* save away r1 */
-	ur->r1 = (ulong)up->ureg;		/* arg 1 is ureg* */
-	*(ulong*)(sp+1*BY2WD) = (ulong)up->ureg;	/* arg 1 0(FP) is ureg* */
-	*(ulong*)(sp+0*BY2WD) = 0;		/* arg 0 is pc */
+	up->svhr1 = ur->hr1;			/* save away r1 */
+	ur->r1 = (long)up->ureg;		/* arg 1 is ureg* */
+	ur->hr1 = 0;
+	if(ur->r1 < 0)
+		ur->hr1 = ~0;
+	((ulong*)sp)[1] = (ulong)up->ureg;	/* arg 1 0(FP) is ureg* */
+	((ulong*)sp)[0] = 0;			/* arg 0 is pc */
 	ur->usp = sp;
 	ur->pc = (ulong)up->notify;
 	up->notified = 1;
@@ -546,6 +570,7 @@ noted(Ureg **urp, ulong arg0)
 
 	memmove(*urp, up->ureg, sizeof(Ureg));
 	(*urp)->r1 = up->svr1;
+	(*urp)->hr1 = up->svhr1;
 	switch(arg0) {
 	case NCONT:
 		if(!okaddr(nur->pc, 1, 0) || !okaddr(nur->usp, BY2WD, 0)){
@@ -638,6 +663,9 @@ error:
 	splhi();
 	if(up->scallnr!=RFORK && (up->procctl || up->nnote)){
 		ur->r1 = ret;			/* load up for noted() */
+		ur->hr1 = 0;
+		if(ur->r1 < 0)
+			ur->hr1 = ~0;
 		if(notify(ur))
 			return ur->r1;
 	}
diff --git a/carrera/ureg.h b/carrera/ureg.h
index c3c08ca287bafcf7e18cb8e3ae2f6a210349853d..b05e24a54e7f6cd102d27241d114b59d0cc7e3a3 100644
--- a/carrera/ureg.h
+++ b/carrera/ureg.h
@@ -1,46 +1 @@
-struct Ureg
-{
-	ulong	status;
-	long	pc;
-	union
-	{
-		long	sp;		/* r29 */
-		long	usp;		/* r29 */
-	};
-	ulong	cause;
-	ulong	badvaddr;
-	ulong	tlbvirt;
-
-	long	pad;	long	hi;
-	long	pad;	long	lo;
-	long	pad;	long	r31;
-	long	pad;	long	r30;
-	long	pad;	long	r28;
-	long	pad;	long	r27;
-	long	pad;	long	r26;
-	long	pad;	long	r25;
-	long	pad;	long	r24;
-	long	pad;	long	r23;
-	long	pad;	long	r22;
-	long	pad;	long	r21;
-	long	pad;	long	r20;
-	long	pad;	long	r19;
-	long	pad;	long	r18;
-	long	pad;	long	r17;
-	long	pad;	long	r16;
-	long	pad;	long	r15;
-	long	pad;	long	r14;
-	long	pad;	long	r13;
-	long	pad;	long	r12;
-	long	pad;	long	r11;
-	long	pad;	long	r10;
-	long	pad;	long	r9;
-	long	pad;	long	r8;
-	long	pad;	long	r7;
-	long	pad;	long	r6;
-	long	pad;	long	r5;
-	long	pad;	long	r4;
-	long	pad;	long	r3;
-	long	pad;	long	r2;
-	long	pad;	long	r1;
-};
+#include "/mips2/include/ureg.h"
diff --git a/port/sysproc.c b/port/sysproc.c
index c6b6070b694a6a21f89e6980c5388f2268e6e0ac..a9a55bcba9b715d5432ed5bd8bee6b84afdd4180 100644
--- a/port/sysproc.c
+++ b/port/sysproc.c
@@ -215,7 +215,7 @@ sysexec(ulong *arg)
 	magic = l2be(exec.magic);
 	text = l2be(exec.text);
 	entry = l2be(exec.entry);
-	if(n==sizeof(Exec) && magic == AOUT_MAGIC){
+	if(n==sizeof(Exec) && (magic == AOUT_MAGIC)){
 		if((text&KZERO)
 		|| entry < UTZERO+sizeof(Exec)
 		|| entry >= UTZERO+sizeof(Exec)+text)