~kris/9p

9hist

66a3682c4534e1c1ac4a97317d4caa3e31181751 — David du Colombier 33 years ago c523b5d
Plan 9 from Bell Labs 1992-12-09
10 files changed, 100 insertions(+), 90 deletions(-)

M pc/devvga.c
M port/devscsi.c
M port/fault.c
M port/page.c
M port/pgrp.c
M port/portdat.h
M port/swap.c
M power/scsi.c
M power/scsibuf.c
M power/trap.c
M pc/devvga.c => pc/devvga.c +1 -2
@@ 587,8 587,7 @@ mbbrect(Rectangle r)
		mbb.max.x = r.max.x;
	if (r.max.y > mbb.max.y)
		mbb.max.y = r.max.y;
	if (Dy(mbb) > 32 || Dx(mbb) > 32)
		mousescreenupdate();
	mousescreenupdate();
}

void

M port/devscsi.c => port/devscsi.c +4 -3
@@ 9,9 9,6 @@
#define	DPRINT	if(debug)kprint

#define DATASIZE	(32*512)
#undef DATASIZE
#define	DATASIZE	(64*1024)


static Scsi	staticcmd;	/* BUG: should be one per scsi device */



@@ 450,6 447,7 @@ scsiinquiry(int dev, void *p, int size)
int
scsiwp(int dev)
{
/* Device specific
	Scsi *cmd;
	int r, status;



@@ 467,6 465,9 @@ scsiwp(int dev)
	if ((status&0xffff) != 0x6000)
		error(Eio);
	return r;
*/
	USED(dev);
	return 0;
}

int

M port/fault.c => port/fault.c +2 -2
@@ 206,7 206,7 @@ pio(Segment *s, ulong addr, ulong soff, Page **p)
		poperror();
		kunmap(k);
		qlock(&s->lk);
		if(*p == 0) { 			/* Someone may have got there first */
		if(*p == 0) { 		/* Someone may have got there first */
			new->daddr = daddr;
			cachepage(new, s->image);
			*p = new;


@@ 214,7 214,7 @@ pio(Segment *s, ulong addr, ulong soff, Page **p)
		else 
			putpage(new);
	}
	else {					/* This is paged out */
	else {				/* This is paged out */
		c = swapimage.c;

		if(waserror()) {

M port/page.c => port/page.c +19 -12
@@ 5,8 5,7 @@
#include	"fns.h"
#include	"../port/error.h"

#define PGHFUN(x, y)	(((ulong)x^(ulong)y)%PGHSIZE)
#define	pghash(s)	palloc.hash[PGHFUN(s->image, p->daddr)]
#define	pghash(daddr)	palloc.hash[(daddr>>PGSHIFT)&(PGHSIZE-1)]

static	Lock pglock;
struct	Palloc palloc;


@@ 113,7 112,7 @@ retry:
	unlock(&palloc);

	lock(p);
	if(p->ref != 0) {			/* lookpage has priority on steal */
	if(p->ref != 0) {	/* lookpage has priority on steal */
		unlock(p);
		goto retry;
	}


@@ 177,7 176,7 @@ putpage(Page *p)
			p->prev = 0;
		}

		palloc.freecount++;		/* Release people waiting for memory */
		palloc.freecount++;	/* Release people waiting for memory */
		unlock(&palloc);
	}
	unlock(p);


@@ 220,13 219,13 @@ duppage(Page *p)				/* Always call with p locked */
		return;
	}

	np = palloc.head;			/* Allocate a new page from freelist */
	if(palloc.head = np->next)		/* = Assign */
	np = palloc.head;		/* Allocate a new page from freelist */
	if(palloc.head = np->next)	/* = Assign */
		palloc.head->prev = 0;
	else
		palloc.tail = 0;

	if(palloc.tail) {			/* Link back onto tail to give us lru */
	if(palloc.tail) {		/* Link back onto tail to give us lru */
		np->prev = palloc.tail;
		palloc.tail->next = np;
		np->next = 0;


@@ 268,7 267,7 @@ copypage(Page *f, Page *t)
}

void
uncachepage(Page *p)				/* Always called with a locked page */
uncachepage(Page *p)			/* Always called with a locked page */
{
	Page **l, *f;



@@ 276,7 275,7 @@ uncachepage(Page *p)				/* Always called with a locked page */
		return;

	lock(&palloc.hashlock);
	l = &pghash(p);
	l = &pghash(p->daddr);
	for(f = *l; f; f = f->hash) {
		if(f == p) {
			*l = p->hash;


@@ 294,10 293,18 @@ cachepage(Page *p, Image *i)
{
	Page **l;

	/* If this ever happens it should be fixed by calling
	 * uncachepage instead of panic. I think there is a race
	 * with pio in which this can happen. Calling uncachepage is
	 * correct - I just wanted to see if we got here.
	 */
	if(p->image)
		panic("cachepage");

	incref(i);
	lock(&palloc.hashlock);
	p->image = i;
	l = &pghash(p);
	l = &pghash(p->daddr);
	p->hash = *l;
	*l = p;
	unlock(&palloc.hashlock);


@@ 309,7 316,7 @@ cachedel(Image *i, ulong daddr)
	Page *f, **l;

	lock(&palloc.hashlock);
	l = &palloc.hash[PGHFUN(i, daddr)];
	l = &pghash(daddr);
	for(f = *l; f; f = f->hash) {
		if(f->image == i && f->daddr == daddr) {
			*l = f->hash;


@@ 326,7 333,7 @@ lookpage(Image *i, ulong daddr)
	Page *f;

	lock(&palloc.hashlock);
	for(f = palloc.hash[PGHFUN(i, daddr)]; f; f = f->hash) {
	for(f = pghash(daddr); f; f = f->hash) {
		if(f->image == i && f->daddr == daddr) {
			unlock(&palloc.hashlock);


M port/pgrp.c => port/pgrp.c +1 -1
@@ 229,6 229,6 @@ resrcwait(char *reason)
	if(u == 0)
		panic("resrcwait");

	tsleep(&u->p->sleep, return0, 0, 1000);
	tsleep(&u->p->sleep, return0, 0, 300);
	u->p->psstate = p;
}

M port/portdat.h => port/portdat.h +2 -1
@@ 433,7 433,8 @@ enum
	RENDHASH =	32,		/* Hash to lookup rendezvous tags */
	MNTHASH	=	32,		/* Hash to walk mount table */
	NFD =		100,		/* Number of per process file descriptors */
	PGHSIZE	=	512,		/* Page hash for image lookup */
	PGHLOG  =	9,
	PGHSIZE	=	1<<PGHLOG,	/* Page hash for image lookup */
};
#define REND(p,s)	((p)->rendhash[(s)%RENDHASH])
#define MOUNTH(p,s)	((p)->mnthash[(s)->qid.path%MNTHASH])

M port/swap.c => port/swap.c +1 -1
@@ 14,7 14,7 @@ void	pager(void*);

enum
{
	Maxpages = 500,	/* Max number of pageouts per segment pass */
	Maxpages = SEGMAXSIZE/BY2PG,	/* Max # of pageouts per segment pass */
};

	Image 	swapimage;

M power/scsi.c => power/scsi.c +66 -57
@@ 64,6 64,8 @@ struct Target
	ulong	flags;
	uchar	sync;
	uchar	transfer;
	uchar	cmdphase;

	Target	*active;		/* link on active list */

	int	target;			/* SCSI Unit and logical unit */


@@ 73,6 75,7 @@ struct Target
	struct {			/* DMA things */
		ulong	dmaaddr;
		ulong	dmalen;
		ulong	dmatx;
		int	rflag;

		ulong	*dmacnt;


@@ 113,9 116,8 @@ static Target target[NCtlr][NTarget];
static	void	dmamap(Target*);

/*
 * Set up and start a data transfer.
 * We don't load the command phase here as
 * we may be continuing a stopped operation.
 * Set up and start a data transfer. This maybe
 * a continuation.
 */
static void
start(Target *tp)


@@ 129,7 131,7 @@ start(Target *tp)
	 */
	*dev->addr = Rlun;
	*dev->data = tp->lun;
	*dev->addr = Rsync;
	*dev->data = tp->cmdphase;
	*dev->data = tp->sync;

	/*


@@ 150,16 152,14 @@ start(Target *tp)
	/*
	 * Load the command into the chip.
	 */
	*dev->addr = Rownid;
	*dev->data = tp->clen;
	*dev->addr = Rcdb;

print("start %d cdb: ", tp->target);
	for(count = 0; count < tp->clen; count++) {
		*dev->data = tp->cdb[count];
		print("%2.2lux ", tp->cdb[count]);
	if(tp->cmdphase < 0x40) {
		*dev->addr = Rownid;
		*dev->data = tp->clen;
		*dev->addr = Rcdb;

		for(count = 0; count < tp->clen; count++)
			*dev->data = tp->cdb[count];
	}
print("\n");
	dmamap(tp);

	/*


@@ 182,8 182,7 @@ arbitrate(Target *dev)

	tp = dev->active;

	*dev->addr = Rcmdphase;
	*dev->data = 0x00;
	tp->cmdphase = 0x00;

	if(tp->flags & Fidentified) {
		start(tp);


@@ 198,6 197,7 @@ arbitrate(Target *dev)
	tp->flags |= Fidentifying|Fretry;
	*dev->addr = Rlun;
	*dev->data = tp->lun;
	*dev->data = 0x00;				/* cmdphase */
	*dev->addr = Rdestid;
	*dev->data = tp->target;
	*dev->addr = Rcmd;


@@ 211,23 211,25 @@ done(void *arg)
}

static int
scsiio(int nbus, int unit, int rw, uchar *cmd, int cbytes, void *data, int dbytes)
scsiio(int nbus, Scsi *p, int rw)
{
	ulong s;
	int status;
	Target *ctlr, **l, *f, *tp;

	tp = &target[nbus][unit];
	tp = &target[nbus][p->target];
	ctlr = tp->ctlr;

	qlock(tp);
	tp->flags |= Fbusy;
	tp->rflag = rw;
	tp->dmaaddr = (ulong)data;
	tp->dmalen = dbytes;
	tp->dmaaddr = (ulong)p->data.base;
	tp->dmalen = p->data.lim - p->data.base;
	tp->dmatx = 0;
	tp->status = 0x6002;
	memmove(tp->cdb, cmd, cbytes);
	tp->clen = cbytes;

	tp->clen = p->cmd.lim - p->cmd.base;
	memmove(tp->cdb, p->cmd.base, tp->clen);

	s = splhi();
	qlock(ctlr);


@@ 258,19 260,17 @@ scsiio(int nbus, int unit, int rw, uchar *cmd, int cbytes, void *data, int dbyte
	sleep(tp, done, tp);

	status = tp->status;
	p->data.ptr += tp->dmatx;

	qunlock(tp);
print("status: #%4.4lux\n", status);

	return status;
}

int
scsiexec(Scsi *p, int read)
{
	int rw, s;
	ulong clen, dlen;

	clen = p->cmd.lim - p->cmd.base;
	dlen = p->data.lim - p->data.base;
	int rw;

	rw = 1;
	if(read == ScsiIn)


@@ 279,9 279,9 @@ scsiexec(Scsi *p, int read)
	if(p->target == CtlrID)
		return 0x6002;

	s = scsiio(1, p->target, rw, p->cmd.base, clen, p->data.base, dlen);
	p->status = s;
	return s;
	p->status = scsiio(1, p, rw);

	return p->status;
}

/*


@@ 384,19 384,19 @@ identify(Target *tp, uchar status)

	switch(status){

	case 0x11:					/* select complete */
	case 0x11:				/* select complete */
		delay(7);
		*dev->addr = Rcmd;
		*dev->data = Catn;
		break;

	case 0x8E:					/* service required - MSGOUT */
	case 0x8E:				/* service required - MSGOUT */
		/*
		 * Send a synchronous data transfer request.
		 * The target may act strangely here and not respond
		 * correctly.
		 */
		tp->sync = 0x00;			/* asynchronous transfer mode */
		tp->sync = 0x00;		/* asynchronous transfer mode */
		tp->flags |= Fidentified;
		*dev->addr = Rtchi;
		*dev->data = 0x00;


@@ 423,8 423,8 @@ identify(Target *tp, uchar status)
		}
		break;

	case 0x1F:					/* transfer complete - MSGIN */
	case 0x4F:					/* unexpected MSGIN */
	case 0x1F:				/* transfer complete - MSGIN */
	case 0x4F:				/* unexpected MSGIN */
		/*
		 * Collect the response. The first 3 bytes
		 * of an extended message are:


@@ 480,7 480,7 @@ identify(Target *tp, uchar status)
		*dev->data = Mnop;
		break;

	case 0x20:					/* transfer info paused */
	case 0x20:				/* transfer info paused */
		delay(7);
		*dev->addr = Rcmd;
		*dev->data = Cnack;


@@ 492,8 492,7 @@ identify(Target *tp, uchar status)
		 * Fretry should be set, so we will
		 * pick up from here.
		 */
		*dev->addr = Rcmdphase;
		*dev->data = 0x30;			/* command phase has begun */
		tp->cmdphase = 0x30;		/* command phase has begun */
		complete(dev);
		break;



@@ 506,8 505,8 @@ identify(Target *tp, uchar status)
static void
saveptr(Target *tp)
{
	ulong count;
	Target *dev;
	ulong count, tx;

	*tp->dmafls = 1;



@@ 521,11 520,10 @@ saveptr(Target *tp)
	count += (*dev->data & 0xFF)<<8;
	count += (*dev->data & 0xFF);

	tp->dmaaddr += tp->dmalen - count;
	tx = tp->dmalen - count;
	tp->dmaaddr += tx;
	tp->dmalen = count;

	*dev->addr = Rcmd;
	*dev->data = tp->transfer;
	tp->dmatx += tx;
}

int


@@ 543,19 541,25 @@ scsistatus(Target *ctlr)
void
scsiintr(int ctlrno)
{
	uchar status, x;
	uchar status, x, phase;
	Target *ctlr, *tp;

	ctlr = &target[ctlrno][CtlrID];
	tp = ctlr->active;

	if(*ctlr->addr & 0x20)
		print("busy\n");

	*ctlr->addr = Rcmdphase;
	phase = *ctlr->data;

	*ctlr->addr = Rstatus;
	status = *ctlr->data;
print("scsiintr: #%2.2lux\n", status);
	if(tp == 0)
		return;

	switch(status){
	case 0x00:				/* reset interrupt */
		return;

	case 0x42:				/* timeout */
		tp->flags &= ~Fretry;
		scsistatus(ctlr);		/* Must read lun register */


@@ 569,17 573,24 @@ print("scsiintr: #%2.2lux\n", status);
		 * with the final command phase, which
		 * should be 0x60.
		 */
		saveptr(tp);
		tp->status = scsistatus(ctlr);	/* target status */
		complete(ctlr);
		return;

	case 0x21:					/* save data pointers */
	case 0x21:				/* save data pointers */
		saveptr(tp);
		*ctlr->addr = Rcmd;
		*ctlr->data = tp->transfer;
		return;

	case 0x4B:					/* unexpected status phase */
	case 0x4B:				/* unexpected status phase */
		saveptr(tp);
		*ctlr->addr = Rcmdphase;
		*ctlr->data = 0x46;			/*  */
		if(phase <= 0x3c)
			*ctlr->data = 0x41;	/* resume no data */
		else
			*ctlr->data = 0x46;	/* collect status */
		*ctlr->addr = Rtchi;
		*ctlr->data = 0;
		*ctlr->data = 0;


@@ 590,8 601,7 @@ print("scsiintr: #%2.2lux\n", status);

	case 0x85:					/* disconnect */
		if(tp->flags & Fidentifying){
			*ctlr->addr = Rcmdphase;
			*ctlr->data = 0x00;		/* complete retry */
			tp->cmdphase = 0x00;		/* complete retry */
			complete(ctlr);
			return;
		}


@@ 603,8 613,7 @@ print("scsiintr: #%2.2lux\n", status);
		x = *ctlr->data;
		if(x & Siv){				/* source ID valid */
			reselect(ctlr, x & 0x07);
			*ctlr->addr = Rcmdphase;
			*ctlr->data = 0x44;		/* reselected by target */
			ctlr->active->cmdphase = 0x44;	/* reselected by target */
			start(ctlr->active);
			return;
		}


@@ 666,14 675,14 @@ scsiicltr(int ctlrnr, uchar *data, uchar *addr, ulong *cnt, uchar *fls, ulong ma
	 * Freselect means enable the chip to
	 * respond to reselects.
	 */
	ctlr->flags = /*Freselect|*/Fidentified;
	ctlr->flags = Freselect|Fidentified;

	*ctlr->addr = Rcontrol;
	*ctlr->data = BurstDma|Edi|Idi|Hsp;
	*ctlr->addr = Rtimeout;
	*ctlr->data = 40;				/* 200ms */
	*ctlr->addr = Rsrcid;

	*ctlr->addr = Rsrcid;
	if(ctlr->flags & Freselect)
		*ctlr->data = Er;
	else


@@ 712,7 721,7 @@ void
resetscsi(void)
{
	uchar m3;
print("scsi init\n");

	/*
	 * Reset both scsi busses
	 */

M power/scsibuf.c => power/scsibuf.c +1 -1
@@ 13,7 13,7 @@
 * This is simplistic at best, and opportunities for
 * deadlock abound.
 */
#define Nbuf	2
#define Nbuf	32

struct {
	Lock;

M power/trap.c => power/trap.c +3 -10
@@ 182,7 182,7 @@ intr(Ureg *ur)
		cause &= ~INTR1;
	}

	if(cause & INTR5){
	while(cause & INTR5) {
		any = 0;
		if(!(*MPBERR1 & (1<<8))){
			print("MP bus error %lux %lux\n", *MPBERR0, *MPBERR1);


@@ 281,18 281,11 @@ intr(Ureg *ur)
			}
		}
		/*
		 *  if nothing else, what the hell?
		 */
		if(!any && bogies++<10){
			print("bogus intr lvl 5 pend %lux on %d\n", npend, m->machno);
			USED(npend);
			delay(100);
		}
		/*
		 *  6. re-enable interrupts
		 */
		*IO2SETMASK = 0xff000000;
		cause &= ~INTR5;
		if(any == 0)
			cause &= ~INTR5;
	}

	if(cause & (INTR2|INTR4)) {