From 56c9899aa44ac7f73bd646358ab71d6ee3c16ed9 Mon Sep 17 00:00:00 2001 From: David du Colombier <0intro@gmail.com> Date: Fri, 8 May 1998 00:00:00 +0000 Subject: [PATCH] Plan 9 from Bell Labs 1998-05-08 --- pc/vgamach64xx.c | 55 ++++++++++++++++++++++++++++++++++-------------- pc/vgamga2164w.c | 4 ++-- port/proc.c | 6 +++++- 3 files changed, 46 insertions(+), 19 deletions(-) diff --git a/pc/vgamach64xx.c b/pc/vgamach64xx.c index 605c434f6340130f2e9b30fe0d9d4586e12f260d..08588cb3f7341ce9d43a6067317d88d149c0833c 100644 --- a/pc/vgamach64xx.c +++ b/pc/vgamach64xx.c @@ -12,7 +12,7 @@ #include "screen.h" /* - * ATI Mach64. + * ATI Mach64(CT|ET|GP|GT|GU|VT|VU). */ static ushort mach64xxdid[] = { ('C'<<8)|'T', @@ -35,12 +35,10 @@ mach64xxpci(void) return nil; for(did = mach64xxdid; *did; did++){ if(*did == p->did) - break; + return p; } - if(*did == 0) - return nil; - return p; + return nil; } static void @@ -53,8 +51,17 @@ mach64xxenable(VGAscr* scr) */ if(scr->io) return; - if(p = mach64xxpci()) - scr->io = p->mem[1].bar & ~0x01; + if(p = mach64xxpci()){ + /* + * The CT doesn't always have the I/O base address + * in the PCI base registers. There is a way to find + * it via the vendor-specific PCI config space but + * this will do for now. + */ + scr->io = p->mem[1].bar & ~0x03; + if(scr->io == 0 && p->did == ('C'<<8)|'T') + scr->io = 0x2EC; + } } static ulong @@ -89,26 +96,42 @@ mach64xxlinear(VGAscr* scr, int* size, int* align) return aperture; } -enum { /* I/O select */ - CurClr0 = 0x18, - CurClr1 = 0x19, - CurOffset = 0x1a, - CurHVposn = 0x1b, - CurHVoff = 0x1c, +enum { /* MM offset */ + + CurClr0 = 0x0B, /* I/O Select */ + CurClr1 = 0x0C, + CurOffset = 0x0D, + CurHVposn = 0x0E, + CurHVoff = 0x0F, - GenTestCntl = 0x34, + GenTestCntl = 0x19, +}; + +static uchar mmoffset[] = { + [CurClr0] 0x18, + [CurClr1] 0x19, + [CurOffset] 0x1a, + [CurHVposn] 0x1b, + [CurHVoff] 0x1c, + + [GenTestCntl] 0x34, }; static ulong ior32(VGAscr* scr, int r) { - return inl((r<<2)+scr->io); + if(scr->io == 0x2EC || scr->io == 0x1C8) + return inl((r<<10)+scr->io); + return inl((mmoffset[r]<<2)+scr->io); } static void iow32(VGAscr* scr, int r, ulong l) { - outl(((r)<<2)+scr->io, l); + if(scr->io == 0x2EC || scr->io == 0x1C8) + outl(((r)<<10)+scr->io, l); + else + outl((mmoffset[r]<<2)+scr->io, l); } static void diff --git a/pc/vgamga2164w.c b/pc/vgamga2164w.c index adafa60ebd99d0e19bc80df7fce64d482604ebce..da9bdeaff3603e59e3099ab449d2e11161400030 100644 --- a/pc/vgamga2164w.c +++ b/pc/vgamga2164w.c @@ -12,8 +12,8 @@ #include "screen.h" /* - * Matrox Millenium and Matrox Millenium II. - * Matrox MGA-2064W, MGA-2164W 3D graphics accelerators + * Matrox Millennium and Matrox Millennium II. + * Matrox MGA-2064W, MGA-2164W 3D graphics accelerators. * Texas Instruments Tvp3026 RAMDAC. */ diff --git a/port/proc.c b/port/proc.c index 3d07bc34382a01503bc8fcb961862d1c04500fac..524ce4a7e66019e0f25d8a725db4e1215e605bb9 100644 --- a/port/proc.c +++ b/port/proc.c @@ -428,8 +428,12 @@ sleep(Rendez *r, int (*f)(void*), void *arg) up->notepending = 0; s = splhi(); lock(&up->rlock); - if(r->p == up) + if(r->p == up){ + /* undo the sleep1() */ + up->r = 0; r->p = 0; + up->state = Running; + } unlock(&up->rlock); splx(s); error(Eintr);