From 4862a3bdfce7df7819afd55c8971f266cf5ca4e1 Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Wed, 27 Sep 2000 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 2000-09-27

---
 bitsy/main.c     | 4 ++++
 pc/vgaclgd542x.c | 1 +
 2 files changed, 5 insertions(+)

diff --git a/bitsy/main.c b/bitsy/main.c
index 2d37fb977e31668a3025dc5a955048af6dff399d..660fa3bae39b32653c4d4e9c33887bdc5130000a 100644
--- a/bitsy/main.c
+++ b/bitsy/main.c
@@ -14,10 +14,14 @@ Conf conf;
 void
 main(void)
 {
+	int i;
+
 	iprint("bitsy kernel\n");
 	confinit();
 	xinit();
 	mmuinit();
+	delay(100000);
+	exit(1);
 }
 
 /*
diff --git a/pc/vgaclgd542x.c b/pc/vgaclgd542x.c
index 951a142c15b1f526c717e207bb4440a82e16ceca..6dd95e9e8a3dc304a915ccab304f7db4906e25b3 100644
--- a/pc/vgaclgd542x.c
+++ b/pc/vgaclgd542x.c
@@ -133,6 +133,7 @@ clgd542xenable(VGAscr* scr)
 	case 0xA8:				/* CL-GD5434 */
 	case 0xAC:				/* CL-GD5436 */
 	case 0xB8:				/* CL-GD5446 */
+	case 0x30:				/* CL-GD7543 */
 		/*
 		 * Attempt to intuit the memory size from the DRAM control
 		 * register. Minimum is 512KB.