From 3ea8daa11ae12082905d733723e0ec58435364e8 Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Mon, 11 May 1998 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 1998-05-11

---
 pc/ether82557.c  | 88 +++++++++++++++++++++++++++++++++++++++++++-----
 pc/vgamach64xx.c | 19 ++++++++---
 port/proc.c      |  3 +-
 3 files changed, 96 insertions(+), 14 deletions(-)

diff --git a/pc/ether82557.c b/pc/ether82557.c
index 7d07d00d7367858e848b8d1ebf4ad029d0921332..88fb96b971a4bcb3a1553168a7aeacb6df2a774a 100644
--- a/pc/ether82557.c
+++ b/pc/ether82557.c
@@ -854,7 +854,7 @@ i82557pci(void)
 static int
 reset(Ether* ether)
 {
-	int an, i, phyaddr, port, x;
+	int anar, anlpar, bmcr, bmsr, force, i, phyaddr, port, x;
 	unsigned short sum;
 	Block *bp, **bpp;
 	Adapter *ap;
@@ -945,10 +945,14 @@ reset(Ether* ether)
 		 *	0x0040		10BASE-T Full Duplex
 		 *	0x0020		10BASE-T
 		 */
-		an = miir(ctlr, phyaddr, 0x04);
-		an &= miir(ctlr, phyaddr, 0x05) & 0x03E0;
-		if(an & 0x380)
-			ether->mbps = 100;
+		anar = miir(ctlr, phyaddr, 0x04);
+		anlpar = miir(ctlr, phyaddr, 0x05) & 0x03E0;
+		anar &= anlpar;
+		bmcr = 0;
+		if(anar & 0x380)
+			bmcr = 0x2000;
+		if(anar & 0x0140)
+			bmcr |= 0x0100;
 
 		switch((ctlr->eeprom[6]>>8) & 0x001F){
 
@@ -957,21 +961,89 @@ reset(Ether* ether)
 			/*
 			 * The DP83840[A] requires some tweaking for
 			 * reliable operation.
+			 * The manual says bit 10 should be unconditionally
+			 * set although it supposedly only affects full-duplex
+			 * operation (an & 0x0140).
 			 */
 			x = miir(ctlr, phyaddr, 0x17) & ~0x0520;
-			x |= 0x0020;
+			x |= 0x0420;
 			for(i = 0; i < ether->nopt; i++){
 				if(cistrcmp(ether->opt[i], "congestioncontrol"))
 					continue;
 				x |= 0x0100;
 				break;
 			}
-			if(an & 0x0140)
-				x |= 0x0400;
 			miiw(ctlr, phyaddr, 0x17, x);
+
+			/*
+			 * If the link partner can't autonegotiate, determine
+			 * the speed from elsewhere.
+			 */
+			if(anlpar == 0){
+				miir(ctlr, phyaddr, 0x01);
+				bmsr = miir(ctlr, phyaddr, 0x01);
+				x = miir(ctlr, phyaddr, 0x19);
+				if((bmsr & 0x0004) && !(x & 0x0040))
+					bmcr = 0x2000;
+			}
+			break;
+
+		case 0x07:				/* Intel 82555 */
+			/*
+			 * Auto-negotiation may fail if the other end is
+			 * a DP83840A and the cable is short.
+			 */
+			miir(ctlr, phyaddr, 0x01);
+			bmsr = miir(ctlr, phyaddr, 0x01);
+			if((miir(ctlr, phyaddr, 0) & 0x1000) && !(bmsr & 0x0020)){
+				miiw(ctlr, phyaddr, 0x1A, 0x2010);
+				x = miir(ctlr, phyaddr, 0);
+				miiw(ctlr, phyaddr, 0, 0x0200|x);
+				for(i = 0; i < 3000; i++){
+					delay(1);
+					if(miir(ctlr, phyaddr, 0x01) & 0x0020)
+						break;
+				}
+				miiw(ctlr, phyaddr, 0x1A, 0x2000);
+					
+				anar = miir(ctlr, phyaddr, 0x04);
+				anlpar = miir(ctlr, phyaddr, 0x05) & 0x03E0;
+				anar &= anlpar;
+				bmcr = 0;
+				if(anar & 0x380)
+					bmcr = 0x2000;
+				if(anar & 0x0140)
+					bmcr |= 0x0100;
+			}
 			break;
 		}
 
+		/*
+		 * Force speed and duplex if no auto-negotiation.
+		 */
+		if(anlpar == 0){
+			force = 0;
+			for(i = 0; i < ether->nopt; i++){
+				if(cistrcmp(ether->opt[i], "fullduplex") == 0){
+					force = 1;
+					bmcr |= 0x0100;
+					ctlr->configdata[19] |= 0x40;
+				}
+				else if(cistrcmp(ether->opt[i], "speed") == 0){
+					force = 1;
+					x = strtol(&ether->opt[i][6], 0, 0);
+					if(x == 10)
+						bmcr &= ~0x2000;
+					else if(x == 100)
+						bmcr |= 0x2000;
+					else
+						force = 0;
+				}
+			}
+			if(force)
+				miiw(ctlr, phyaddr, 0x00, bmcr);
+		}
+
 		ctlr->configdata[8] = 1;
 		ctlr->configdata[15] &= ~0x80;
 	}
diff --git a/pc/vgamach64xx.c b/pc/vgamach64xx.c
index 08588cb3f7341ce9d43a6067317d88d149c0833c..7bfecbf869fedae052a5be7dd4a76e3c59242b55 100644
--- a/pc/vgamach64xx.c
+++ b/pc/vgamach64xx.c
@@ -96,8 +96,7 @@ mach64xxlinear(VGAscr* scr, int* size, int* align)
 	return aperture;
 }
 
-enum {					/* MM offset */
-
+enum {
 	CurClr0		= 0x0B,		/* I/O Select */
 	CurClr1		= 0x0C,
 	CurOffset	= 0x0D,
@@ -110,9 +109,9 @@ enum {					/* MM offset */
 static uchar mmoffset[] = {
 	[CurClr0]	0x18,
 	[CurClr1]	0x19,
-	[CurOffset]	0x1a,
-	[CurHVposn]	0x1b,
-	[CurHVoff]	0x1c,
+	[CurOffset]	0x1A,
+	[CurHVposn]	0x1B,
+	[CurHVoff]	0x1C,
 
 	[GenTestCntl]	0x34,
 };
@@ -159,6 +158,16 @@ mach64xxcurload(VGAscr* scr, Cursor* curs)
 	p = KADDR(scr->aperture);
 	p += scr->storage;
 
+	/*
+	 * Initialise the 64x64 cursor RAM array.
+	 * The cursor mode gives the following truth table:
+	 *	p1 p0	colour
+	 *	 0  0	Cursor Colour 0
+	 *	 0  1	Cursor Colour 1
+	 *	 1  0	Transparent
+	 *	 1  1	Complement
+	 * Put the cursor into the top-right of the 64x64 array.
+	 */
 	for(y = 0; y < 16; y++){
 		for(i = 0; i < (64-16)/8; i++){
 			*p++ = 0xAA;
diff --git a/port/proc.c b/port/proc.c
index 07b0038c161cc8b4bdc8ef843b4fe5de978612ce..71287bef430ac2c2cb9355df32528ae7d09c234d 100644
--- a/port/proc.c
+++ b/port/proc.c
@@ -433,7 +433,8 @@ sleep(Rendez *r, int (*f)(void*), void *arg)
 			/* undo the sleep1() */
 			up->r = 0;
 			r->p = 0;
-			up->state = Running;
+			if(up->state == Wakeme)
+				up->state = Running;
 		}
 		unlock(&up->rlock);
 		splx(s);