~kris/9p

9hist

3179b983938f02f22a8f91c5dbdfa29f902842b7 — David du Colombier 24 years ago 0ed7376
Plan 9 from Bell Labs 2002-04-11
14 files changed, 69 insertions(+), 144 deletions(-)

M bitsy/clock.c
M bitsy/power.c
M boot/boot.c
D pc/cycintr.c
M pc/devarch.c
M pc/etherelnk3.c
M pc/fns.h
M pc/kbd.c
M pc/main.c
M pc/mp.c
M port/chan.c
M port/edf.c
M port/pgrp.c
M port/tod.c
M bitsy/clock.c => bitsy/clock.c +5 -3
@@ 19,8 19,10 @@ typedef struct OSTimer
OSTimer *timerregs = (OSTimer*)OSTIMERREGS;
static int clockinited;

static void	clockintr(Ureg*, void*);
static uvlong when;	/* scheduled time of next interrupt */
static void		clockintr(Ureg*, void*);
static uvlong	when;	/* scheduled time of next interrupt */

long	timeradjust;

enum
{


@@ 105,7 107,7 @@ timerset(uvlong v)
	/* post next interrupt: calculate # of tics from now */
	tics = next - timerregs->oscr - Maxfreq;
	if (tics > Minfreq){
		iprint("%lud %lud %lud %d\n", next, tics, timerregs->oscr, Minfreq);
		timeradjust++;
		next = timerregs->oscr + Maxfreq;
	}
	timerregs->osmr[0] = next;

M bitsy/power.c => bitsy/power.c +7 -0
@@ 266,9 266,16 @@ onoffintr(Ureg* , void*)
	wakeup(&powerr);
}

static void
blanktimer(void)
{
	drawactive(0);
}

void
powerinit(void)
{
	addclock0link(blanktimer);
	intrenable(GPIOrising, bitno(GPIO_PWR_ON_i), onoffintr, nil, "on/off");
}


M boot/boot.c => boot/boot.c +4 -1
@@ 229,10 229,13 @@ rootserver(char *arg)
	/* parse replies */
	for(;;){
		outin(prompt, reply, sizeof(reply));
		if(strlen(reply) == 0)
			continue;
		mp = findmethod(reply);
		if(mp){
	    HaveMethod:
			bargc = tokenize(reply, bargv, Nbarg-1);
			bargc = tokenize(reply, bargv, Nbarg-2);
			bargv[bargc] = nil;
			cp = strchr(reply, '!');
			if(cp)
				strcpy(sys, cp+1);

D pc/cycintr.c => pc/cycintr.c +0 -96
@@ 1,96 0,0 @@
#include "u.h"
#include "../port/lib.h"
#include "mem.h"
#include "dat.h"
#include "fns.h"
#include "io.h"


static struct
{
	Lock;
	Timer	*ci;
}timers;

/*
 * called by clockintrsched()
 */
vlong
timernext(void)
{
	Timer *ci;
	vlong when;

	ilock(&timers);
	when = 0;
	ci = timers.ci;
	if(ci != nil)
		when = ci->when;
	iunlock(&timers);
	return when;
}

vlong
checktimer(Ureg *u, void*)
{
	Timer *ci;
	vlong when;

	ilock(&timers);
	while(ci = timers.ci){
		when = ci->when;
		if(when > fastticks(nil)){
			iunlock(&timers);
			return when;
		}
		timers.ci = ci->next;
		iunlock(&timers);
		(*ci->f)(u, ci);
		ilock(&timers);
	}
	iunlock(&timers);
	return 0;
}

void
timeradd(Timer *nci)
{
	Timer *ci, **last;

	ilock(&timers);
	last = &timers.ci;
	while(ci = *last){
		if(ci == nci){
			*last = ci->next;
			break;
		}
		last = &ci->next;
	}

	last = &timers.ci;
	while(ci = *last){
		if(ci->when > nci->when)
			break;
		last = &ci->next;
	}
	nci->next = *last;
	*last = nci;
	iunlock(&timers);
}

void
timerdel(Timer *dci)
{
	Timer *ci, **last;

	ilock(&timers);
	last = &timers.ci;
	while(ci = *last){
		if(ci == dci){
			*last = ci->next;
			break;
		}
		last = &ci->next;
	}
	iunlock(&timers);
}

M pc/devarch.c => pc/devarch.c +4 -5
@@ 734,14 734,13 @@ archinit(void)
	}

	/*
	 * Decide whether to use copy-on-reference (386 and mp).
	 *  Decide whether to use copy-on-reference (386 and mp).
	 *  We get another chance to set it in mpinit() for a
	 *  multiprocessor.
	 */
	if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1)
	if(X86FAMILY(m->cpuidax) == 3)
		conf.copymode = 1;

	if(X86FAMILY(m->cpuidax) >= 5 && conf.nmach > 1)
		coherence = wbflush;

	addarchfile("cputype", 0444, cputyperead, nil);
}


M pc/etherelnk3.c => pc/etherelnk3.c +5 -9
@@ 1388,10 1388,8 @@ tcm509isa(void)
	 * it fully.
	 */
	while(port = activate()){
		if(ioalloc(port, 0x10, 0, "tcm509isa") < 0){
			print("tcm509isa: port 0x%uX in use\n", port);
		if(ioalloc(port, 0x10, 0, "tcm509isa") < 0)
			continue;
		}

		/*
		 * 6. Tag the adapter so it won't respond in future.


@@ 1450,10 1448,9 @@ tcm5XXeisa(void)
	 */
	for(slot = 1; slot < MaxEISA; slot++){
		port = slot*0x1000;
		if(ioalloc(port, 0x1000, 0, "tcm5XXeisa") < 0){
			print("tcm5XXeisa: port 0x%uX in use\n", port);
		if(ioalloc(port, 0x1000, 0, "tcm5XXeisa") < 0)
			continue;
		}

		if(ins(port+0xC80+ManufacturerID) != 0x6D50){
			iofree(port);
			continue;


@@ 1493,10 1490,9 @@ tcm59Xpci(void)
			continue;
		port = p->mem[0].bar & ~0x01;
		if((port = ioalloc((port == 0)? -1: port,  p->mem[0].size, 
					  0, "tcm59Xpci")) < 0){
			print("tcm59Xpci: port 0x%uX in use\n", port);
					  0, "tcm59Xpci")) < 0)
			continue;
		}

		irq = p->intl;
		COMMAND(port, GlobalReset, 0);
		while(STATUS(port) & commandInProgress)

M pc/fns.h => pc/fns.h +1 -0
@@ 66,6 66,7 @@ int	ioalloc(int, int, int, char*);
int	ioreserve(int, int, int, char*);
int	iprint(char*, ...);
int	isaconfig(char*, int, ISAConf*);
void	kbdenable(void);
void	kbdinit(void);
#define	kmapinval()
void	lapicclock(Ureg*, void*);

M pc/kbd.c => pc/kbd.c +14 -10
@@ 398,16 398,6 @@ kbdinit(void)
{
	int c;

	kbdq = qopen(4*1024, 0, 0, 0);
	if(kbdq == nil)
		panic("kbdinit");
	qnoblock(kbdq, 1);

	ioalloc(Data, 1, 0, "kbd");
	ioalloc(Cmd, 1, 0, "kbd");

	intrenable(IrqKBD, i8042intr, 0, BUSUNKNOWN, "kbd");

	/* wait for a quiescent controller */
	while((c = inb(Status)) & (Outbusy | Inready))
		if(c & Inready)


@@ 433,3 423,17 @@ kbdinit(void)
	outb(Data, ccc);
	outready();
}

void
kbdenable(void)
{
	kbdq = qopen(4*1024, 0, 0, 0);
	if(kbdq == nil)
		panic("kbdinit");
	qnoblock(kbdq, 1);

	ioalloc(Data, 1, 0, "kbd");
	ioalloc(Cmd, 1, 0, "kbd");

	intrenable(IrqKBD, i8042intr, 0, BUSUNKNOWN, "kbd");
}

M pc/main.c => pc/main.c +2 -1
@@ 81,6 81,7 @@ main(void)

	print("\nPlan 9\n");

	kbdinit();
	i8253init();
	cpuidentify();
	screeninit();


@@ 96,7 97,7 @@ main(void)
		arch->intrinit();
	timersinit();
	mathinit();
	kbdinit();
	kbdenable();
	if(arch->clockenable)
		arch->clockenable();
	procinit0();

M pc/mp.c => pc/mp.c +11 -3
@@ 568,11 568,19 @@ mpinit(void)
	}

	/*
	 * Remember to set conf.copymode here if nmach > 1.
	 * Should look for an ExtINT line and enable it.
	 *  we don't really know the number of processors till
	 *  here.
	 *
	 *  set conf.copymode here if nmach > 1.
	 *  Should look for an ExtINT line and enable it.
	 *
	 *  also need to flush write buffer to make things
	 *  visible to other processors.
	 */
	if(conf.nmach > 1)
	if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1)
		conf.copymode = 1;
	if(X86FAMILY(m->cpuidax) >= 5 && conf.nmach > 1)
		coherence = wbflush;
}

static int

M port/chan.c => port/chan.c +7 -7
@@ 9,7 9,6 @@ int chandebug=0;		/* toggled by sysr1 */
QLock chanprint;		/* probably asking for trouble (deadlocks) -rsc */

int domount(Chan**, Mhead**);
Ref mheadcounter;

void
dumpmount(void)		/* DEBUGGING */


@@ 478,7 477,6 @@ if(old->umh)
		 *  head and add to the hash table.
		 */
		m = smalloc(sizeof(Mhead));
incref(&mheadcounter);
		m->ref = 1;
		m->from = old;
		incref(old);


@@ 1364,13 1362,14 @@ char isfrog[256]={
 * or a valid character.
 */
void
validname(char *name, int slashok)
validname(char *aname, int slashok)
{
	char *p, *ename;
	char *p, *ename, *name;
	uint t;
	int c;
	Rune r;

	name = aname;
	if(((ulong)name & KZERO) != KZERO) {
		p = name;
		t = BY2PG-((ulong)p&(BY2PG-1));


@@ 1391,8 1390,10 @@ validname(char *name, int slashok)
			name += chartorune(&r, name);
		else{
			if(isfrog[c])
				if(!slashok || c!='/')
					error(Ebadchar);
				if(!slashok || c!='/'){
					snprint(up->genbuf, sizeof(up->genbuf), "%s: %q", Ebadchar, aname);
					error(up->genbuf);
			}
			name++;
		}
	}


@@ 1429,7 1430,6 @@ void
putmhead(Mhead *m)
{
	if(m && decref(m) == 0){
decref(&mheadcounter);
		m->mount = (Mount*)0xCafeBeef;
		free(m);
	}

M port/edf.c => port/edf.c +6 -4
@@ 104,10 104,7 @@ isedf(Proc *p)
int
edfanyready(void)
{
	/* If any edf tasks (with runnable procs in them) are released,
	 * at least one of them must be on the stack
	 */
	return edfstack[m->machno].head != nil;
	return edfstack[m->machno].head || qreleased.head;
}

static void


@@ 686,6 683,11 @@ edfrunproc(void)
	static ulong nilcount;
	int i;

	if (edfstack[m->machno].head == nil && qreleased.head== nil){
		// quick way out
		nilcount++;
		return nil;
	}
	/* Figure out if the current proc should be preempted*/
	ilock(&edflock);
	now = fastticks(nil);

M port/pgrp.c => port/pgrp.c +0 -2
@@ 133,10 133,8 @@ pgrpcpy(Pgrp *to, Pgrp *from)
	for(i = 0; i < MNTHASH; i++) {
		l = tom++;
		for(f = from->mnthash[i]; f; f = f->hash) {
extern Ref mheadcounter;
			rlock(&f->lock);
			mh = smalloc(sizeof(Mhead));
incref(&mheadcounter);
			mh->from = f->from;
			mh->ref = 1;
			incref(mh->from);

M port/tod.c => port/tod.c +3 -3
@@ 38,9 38,9 @@ struct {
	vlong	last;		// last reading of fast clock
	vlong	off;		// offset from epoch to last
	vlong	lasttime;	// last return value from todget
	vlong	delta;		// add 'delta' each slow clock tick from sstart to send
	ulong	sstart;		// ...
	ulong	send;		// ...
	vlong	delta;	// add 'delta' each slow clock tick from sstart to send
	ulong	sstart;	// ...
	ulong	send;	// ...
} tod;

void