~kris/9p

9hist

1dfe5a59f356506276df9ce446f1a2951407b6f5 — David du Colombier 24 years ago c6e4dea
Plan 9 from Bell Labs 2002-04-09
6 files changed, 35 insertions(+), 33 deletions(-)

M boot/bootip.c
M pc/devarch.c
M pc/i8253.c
M pc/mp.c
M pc/vganvidia.c
M port/devenv.c
M boot/bootip.c => boot/bootip.c +2 -0
@@ 52,6 52,8 @@ configip(void)
	bind("#I", mpoint, MAFTER);
	bind("#l0", mpoint, MAFTER);
	bind("#l1", mpoint, MAFTER);
	bind("#l2", mpoint, MAFTER);
	bind("#l3", mpoint, MAFTER);

	/* let ipconfig configure the ip interface */
	switch(pid = fork()){

M pc/devarch.c => pc/devarch.c +1 -1
@@ 734,7 734,7 @@ archinit(void)
	if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1)
		conf.copymode = 1;

	if(X86FAMILY(m->cpuidax) >= 5)
	if(X86FAMILY(m->cpuidax) >= 5 && conf.nmach > 1)
		coherence = wbflush;

	addarchfile("cputype", 0444, cputyperead, nil);

M pc/i8253.c => pc/i8253.c +28 -29
@@ 51,7 51,13 @@ enum
	C2speak=0x2,
	C2out=	0x10,

	/* T2ctl bits */
	T2gate=	(1<<0),		/* enable T2 counting */
	T2spkr=	(1<<1),		/* connect T2 out to speaker */
	T2out=	(1<<5),		/* output of T2 */

	Freq=	1193182,	/* Real clock frequency */
	Tickshift= 8,		/* increase tick wriggle room */

	Minusec=20,		/* minimum cycles for a clock interrupt */



@@ 68,9 74,8 @@ static struct
	long	fastperiod;	/* fastticks/hz */
	long	fast2freq;	/* fastticks*FreqMul/Freq */

	Lock	lock1;		/* mutex for the following */
	ushort	last1;		/* last value of clock 1 */
	uvlong	ticks1;		/* cumulative ticks of counter 1 */
	ushort	last;		/* last value of clock 1 */
	uvlong	ticks;		/* cumulative ticks of counter 1 */
}i8253;

void


@@ 90,12 95,14 @@ i8253init(void)
	outb(T0cntr, (Freq/HZ)>>8);	/* high byte */

	/*
	 *  set time clock
	 *  enable a longer period counter to use as a clock
	 */
	outb(Tmode, Load1|Square);
	i8253.mode = Square;
	outb(T1cntr, 0xfe);	/* low byte */
	outb(T1cntr, 0xff);	/* high byte */
	outb(Tmode, Load2|Square);
	outb(T2cntr, 0);		/* low byte */
	outb(T2cntr, 0);		/* high byte */
	x = inb(T2ctl);
	x |= T2gate;
	outb(T2ctl, x);

	/*
	 * Introduce a little delay to make sure the count is


@@ 241,8 248,6 @@ clockintrsched(void)
	iunlock(&i8253);
}

ulong i8253ding[2];

static void
clockintr0(Ureg* ureg, void *v)
{


@@ 255,12 260,6 @@ clockintr0(Ureg* ureg, void *v)
	now = fastticks(nil);
	when = i8253.when;

if(i8253.last1 == 0 || i8253.last1 >= 0xffe0)
	i8253ding[1]++;
else
	i8253ding[0]++;
	

	if(now >= i8253.when){
		clockintr(ureg, v);
		do


@@ 295,23 294,23 @@ i8253read(uvlong *hz)
	uvlong ticks;

	if(hz)
		*hz = Freq<<8;
		*hz = Freq<<Tickshift;

	ilock(&i8253.lock1);
	outb(Tmode, Latch1);
	y = inb(T1cntr);
	y |= inb(T1cntr)<<8;
	ilock(&i8253);
	outb(Tmode, Latch2);
	y = inb(T2cntr);
	y |= inb(T2cntr)<<8;

	if(y < i8253.last1)
		x = i8253.last1 - y;
	if(y < i8253.last)
		x = i8253.last - y;
	else
		x = i8253.last1 + (0xfffe - y);
	i8253.last1 = y;
	i8253.ticks1 += x>>1;
	ticks = i8253.ticks1;
	iunlock(&i8253.lock1);
		x = i8253.last + (0x1000 - y);
	i8253.last = y;
	i8253.ticks += x>>1;
	ticks = i8253.ticks;
	iunlock(&i8253);

	return ticks<<8;
	return ticks<<Tickshift;
}

/*

M pc/mp.c => pc/mp.c +0 -2
@@ 48,8 48,6 @@ apicclkenable(void)
{
	Apic *apic;

	i8259init();

	/* Uniprocessor local apic init for apic clock */
	apic = &mpapic[0];
	apic->type = PcmpPROCESSOR;

M pc/vganvidia.c => pc/vganvidia.c +1 -0
@@ 42,6 42,7 @@ static ushort nvidiadid[] = {
	0x0151,		/* GeForce2 GTS (rev 1) */
	0x0152,		/* GeForce2 Ultra */
	0x0153,		/* Quadro 2 Pro */
	0x0200,		/* GeForce3 */
	0,
};


M port/devenv.c => port/devenv.c +3 -1
@@ 232,7 232,9 @@ envread(Chan *c, void *a, long n, vlong off)
		error(Enonexist);
	}

	if(offset + n > e->len)
	if(offset > e->len)	/* protects against overflow converting vlong to ulong */
		n = 0;
	else if(offset + n > e->len)
		n = e->len - offset;
	if(n <= 0)
		n = 0;