M pc/i8259.c => pc/i8259.c +15 -11
@@ 27,13 27,13 @@ enum
static int int0mask; /* interrupts enabled for first 8259 */
static int int1mask; /* interrupts enabled for second 8259 */
-static int elcr; /* mask of level-triggered interrupts */
+int elcr; /* mask of level-triggered interrupts */
static Lock i8259lock;
void
i8259init(void)
{
- int elcr1;
+ int x;
ilock(&i8259lock);
int0mask = 0xFF;
@@ 83,18 83,22 @@ i8259init(void)
/*
* Check for Edge/Level register.
* This check may not work for all chipsets.
+ * First try a non-intrusive test - the bits for
+ * IRQs 13, 8, 2, 1 and 0 must be edge (0). If
+ * that's OK try a R/W test.
*/
- elcr1 = inb(Elcr1);
- outb(Elcr1, 0);
- if(inb(Elcr1) == 0){
- outb(Elcr1, 0x20);
- if(inb(Elcr1) == 0x20)
- elcr = (inb(Elcr2)<<8)|elcr1;
+ x = (inb(Elcr2)<<8)|inb(Elcr1);
+ if(!(x & 0x2107)){
+ outb(Elcr1, 0);
+ if(inb(Elcr1) == 0){
+ outb(Elcr1, 0x20);
+ if(inb(Elcr1) == 0x20)
+ elcr = x;
+ outb(Elcr1, x & 0xFF);
+ //print("ELCR: %4.4uX\n", elcr);
+ }
}
- outb(Elcr1, elcr1);
iunlock(&i8259lock);
-// if(elcr)
-// print("ELCR: %4.4uX\n", elcr);
}
int
M pc/mp.c => pc/mp.c +5 -4
@@ 13,6 13,7 @@ static Bus* mpbus;
static Bus* mpbuslast;
static int mpisabus = -1;
static int mpeisabus = -1;
+extern int elcr; /* mask of level-triggered interrupts */
static Apic mpapic[MaxAPICNO+1];
static int machno2apicno[MaxAPICNO+1]; /* inverse map: machno -> APIC ID */
static Lock mprdthilock;
@@ 181,7 182,7 @@ mkiointr(PCMPintr* p)
}
static int
-mpintrinit(Bus* bus, PCMPintr* intr, int vno)
+mpintrinit(Bus* bus, PCMPintr* intr, int vno, int /*irq*/)
{
int el, po, v;
@@ 228,7 229,7 @@ mpintrinit(Bus* bus, PCMPintr* intr, int vno)
/*
*/
- if(bus->type == BusEISA && !po && !el){
+ if(bus->type == BusEISA && !po && !el /*&& !(elcr & (1<<irq))*/){
po = PcmpHIGH;
el = PcmpEDGE;
}
@@ 275,7 276,7 @@ mklintr(PCMPintr* p)
if(p->intr == PcmpExtINT || p->intr == PcmpNMI)
v = ApicIMASK;
else
- v = mpintrinit(bus, p, VectorLAPIC+intin);
+ v = mpintrinit(bus, p, VectorLAPIC+intin, p->irq);
if(p->apicno == 0xFF){
for(apic = mpapic; apic <= &mpapic[MaxAPICNO]; apic++){
@@ 650,7 651,7 @@ mpintrenablex(Vctl* v)
vno, v->irq, v->tbdf);
return -1;
}
- lo = mpintrinit(bus, aintr->intr, vno);
+ lo = mpintrinit(bus, aintr->intr, vno, v->irq);
if(lo & ApicIMASK)
return -1;
lo |= ApicLOGICAL;
M port/devsd.c => port/devsd.c +3 -1
@@ 76,6 76,7 @@ sdgen(Chan *c, Dirtab*, int, int s, Dir *dirp)
Part *p;
int unit;
char name[2*NAMELEN];
+ vlong l;
d = disk;
while(s >= d->npart) {
@@ 90,7 91,8 @@ sdgen(Chan *c, Dirtab*, int, int s, Dir *dirp)
sprint(name, "%s%s", d->vol, p->name);
name[NAMELEN-1] = '\0';
qid = (Qid){(unit<<LogNpart)+s, 0};
- devdir(c, qid, name, (p->end - p->beg) * d->bsize, eve, 0666, dirp);
+ l = (p->end - p->beg) * (vlong)d->bsize;
+ devdir(c, qid, name, l, eve, 0666, dirp);
return 1;
}