From 1b0d2b27f97c86f6a950027bc957e99eebee0eb4 Mon Sep 17 00:00:00 2001
From: David du Colombier <0intro@gmail.com>
Date: Tue, 6 Jan 1998 00:00:00 +0000
Subject: [PATCH] Plan 9 from Bell Labs 1998-01-06

---
 pc/devata.c      | 10 +++++++---
 pc/vgaclgd542x.c |  1 +
 port/devdraw.c   |  5 +++++
 3 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/pc/devata.c b/pc/devata.c
index 3b463c91d76753d1fa33b95a2cac04201a24411a..aa0baa6ba8e0e369651ff5dd0b638d358ad2b5af 100644
--- a/pc/devata.c
+++ b/pc/devata.c
@@ -11,8 +11,8 @@
 #include	"../port/error.h"
 
 
-#define DPRINT if(1)print
-#define XPRINT if(1)print
+#define DPRINT if(0)print
+#define XPRINT if(0)print
 #define ILOCK(x)
 #define IUNLOCK(x)
 
@@ -408,7 +408,8 @@ atactlrprobe(int ctlrno, int irq, int resetok)
 		intrenable(irq, ataintr, ctlr, ctlr->tbdf);
 		atapi |= 0x01;
 		mask |= 0x01;
-		goto skipedd;
+//		goto skipedd;
+goto atapislave;
 	}
 	if(atactlrwait(ctlr, DHmagic, 0, MS2TK(1)) || waserror()){
 		DPRINT("ata%d: Cedd status %ux/%ux/%ux\n", ctlrno,
@@ -446,6 +447,7 @@ atactlrprobe(int ctlrno, int irq, int resetok)
 	if((error & ~0x80) == 0x01)
 		mask |= 0x01;
 
+atapislave:
 	outb(port+Pdh, DHmagic|DHslave);
 	microdelay(1);
 	status = inb(port+Pstatus);
@@ -1837,6 +1839,8 @@ retry:
 	}
 	dp->lbasecs = (cp->buf[0]<<24)|(cp->buf[1]<<16)|(cp->buf[2]<<8)|cp->buf[3];
 	dp->bytes = (cp->buf[4]<<24)|(cp->buf[5]<<16)|(cp->buf[6]<<8)|cp->buf[7];
+	if(dp->bytes > 2048 && dp->bytes <= 2352)
+		dp->bytes = 2048;
 	dp->cap = dp->lbasecs*dp->bytes;
 	DPRINT("%s: atapipart secs %ud, bytes %ud, cap %ud\n",
 		dp->vol, dp->lbasecs, dp->bytes, dp->cap);
diff --git a/pc/vgaclgd542x.c b/pc/vgaclgd542x.c
index ff9ab5ba1a47259dbfa660090761fe758c6ff676..db25ae8409b24b2d153a492a318cb6453a57f27e 100644
--- a/pc/vgaclgd542x.c
+++ b/pc/vgaclgd542x.c
@@ -99,6 +99,7 @@ clgd542xenable(VGAscr* scr)
 	case 0xA0:				/* CL-GD5430 */
 	case 0xA8:				/* CL-GD5434 */
 	case 0xAC:				/* CL-GD5436 */
+	case 0xB8:				/* CL-GD5446 */
 		/*
 		 * Attempt to intuit the memory size from the DRAM control
 		 * register. Minimum is 512KB.
diff --git a/port/devdraw.c b/port/devdraw.c
index ee03b3328f37be20ac20bccd4c81b4c66c66ea96..04b3bbaeb6acd3d4f99705c29409bef58ba9df93 100644
--- a/port/devdraw.c
+++ b/port/devdraw.c
@@ -966,7 +966,12 @@ drawread(Chan *c, void *a, long n, ulong offset)
 			if(cl->refreshme || cl->refresh)
 				break;
 			qunlock(&sdraw);
+			if(waserror()){
+				qlock(&sdraw);	/* restore lock for waserror() above */
+				nexterror();
+			}
 			sleep(&cl->refrend, drawrefactive, cl);
+			poperror();
 			qlock(&sdraw);
 		}
 		p = a;