From 15415d2977c1f5352aa5cb2151225978025980dd Mon Sep 17 00:00:00 2001 From: David du Colombier <0intro@gmail.com> Date: Sat, 28 Oct 2000 00:00:00 +0000 Subject: [PATCH] Plan 9 from Bell Labs 2000-10-28 --- "bitsy/dev\302\265c.c" | 4 ++-- bitsy/fpi.h | 2 +- bitsy/fpiarm.c | 54 ++++++++++++++++++++---------------------- bitsy/l.s | 1 + bitsy/trap.c | 13 ++++------ 5 files changed, 35 insertions(+), 39 deletions(-) diff --git "a/bitsy/dev\302\265c.c" "b/bitsy/dev\302\265c.c" index 15f421ac171a474e9b8198ac37f068a968c5738f..5a010a60760c55b9e9f645b5bc52b05d8349d2aa 100644 --- "a/bitsy/dev\302\265c.c" +++ "b/bitsy/dev\302\265c.c" @@ -116,8 +116,8 @@ int if(len < 1) break; b = p[0] & 0x7f; - up = p[0] & 80; - + up = p[0] & 0x80; + if(b > 5) { /* rocker panel acts like arrow keys */ if(b < 10) diff --git a/bitsy/fpi.h b/bitsy/fpi.h index dfb9b1df7a394e04b02f325fba21e102f654821c..abaa7c120f5ba451e75fc3530a11c7d07d4f6ff2 100644 --- a/bitsy/fpi.h +++ b/bitsy/fpi.h @@ -1,8 +1,8 @@ typedef long Word; typedef unsigned long Single; typedef struct { - unsigned long h; unsigned long l; + unsigned long h; } Double; enum { diff --git a/bitsy/fpiarm.c b/bitsy/fpiarm.c index 757423c74c20dd7212e8a8b76a460a5a9e8d38ae..65de45bb095be94a142016ac93da45e9de2ac90b 100644 --- a/bitsy/fpiarm.c +++ b/bitsy/fpiarm.c @@ -4,14 +4,14 @@ * all arithmetic is done in double precision. * the FP trap status isn't updated. */ -#include "u.h" +#include #include "../port/lib.h" #include "mem.h" #include "dat.h" #include "fns.h" #include "io.h" -#include "ureg.h" +#include #include "fpi.h" @@ -20,13 +20,8 @@ */ -#define REG(x) (*(long*)(((char*)ur)+roff[(x)])) -#define FR(x) (*(Internal*)ufp->regs[(x)&7]) - -/* BUG: check fetch (not worthwhile in Inferno) */ -#define getubyte(a) (*(uchar*)(a)) -#define getuword(a) (*(ushort*)(a)) -#define getulong(a) (*(ulong*)(a)) +#define REG(ur, x) (*(long*)(((char*)(ur))+roff[(x)])) +#define FR(ufp, x) (*(Internal*)(ufp)->regs[(x)&7]) typedef struct FP2 FP2; typedef struct FP1 FP1; @@ -49,7 +44,7 @@ enum { REGPC = 15, }; -int fpemudebug = 1; +int fpemudebug = 0; #undef OFR #define OFR(X) ((ulong)&((Ureg*)0)->X) @@ -210,7 +205,7 @@ fld(void (*f)(Internal*, void*), int d, ulong ea, int n, FPsave *ufp) void *mem; mem = (void*)ea; - (*f)(&FR(d), mem); + (*f)(&FR(ufp, d), mem); if(fpemudebug) print("MOV%c #%lux, F%d\n", n==8? 'D': 'F', ea, d); } @@ -222,7 +217,7 @@ fst(void (*f)(void*, Internal*), ulong ea, int s, int n, FPsave *ufp) void *mem; mem = (void*)ea; - tmp = FR(s); + tmp = FR(ufp, s); if(fpemudebug) print("MOV%c F%d,#%lux\n", n==8? 'D': 'F', s, ea); (*f)(mem, &tmp); @@ -300,7 +295,7 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) off = (op&0xFF)<<2; if((op & (1<<23)) == 0) off = -off; - ea = REG(rn); + ea = REG(ur, rn); if(rn == REGPC) ea += 8; if(op & (1<<24)) @@ -320,7 +315,7 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) if((op & (1<<24)) == 0) ea += off; if(op & (1<<21)) - REG(rn) = ea; + REG(ur, rn) = ea; return; } @@ -335,12 +330,12 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) */ if(rd == 15 && op & (1<<20)){ rn = (op>>16)&7; - fn = &FR(rn); + fn = &FR(ufp, rn); if(op & (1<<3)){ fm = &fpconst[op&7]; tag = 'C'; }else{ - fm = &FR(op&7); + fm = &FR(ufp, op&7); tag = 'F'; } switch((op>>21)&7){ @@ -372,7 +367,7 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) unimp(pc, op); case 0: /* FLT */ rn = (op>>16) & 7; - fpiw2i(&FR(rn), ®(rd)); + fpiw2i(&FR(ufp, rn), ®(ur, rd)); if(fpemudebug) print("MOVW[FD] R%d, F%d\n", rd, rn); break; @@ -380,28 +375,28 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) if(op & (1<<3)) unimp(pc, op); rn = op & 7; - tmp = FR(rn); - fpii2w(®(rd), &tmp); + tmp = FR(ufp, rn); + fpii2w(®(ur, rd), &tmp); if(fpemudebug) - print("MOV[FD]W F%d, R%d =%ld\n", rn, rd, REG(rd)); + print("MOV[FD]W F%d, R%d =%ld\n", rn, rd, REG(ur, rd)); break; case 2: /* FPSR := Rd */ - ufp->status = REG(rd); + ufp->status = REG(ur, rd); if(fpemudebug) print("MOVW R%d, FPSR\n", rd); break; case 3: /* Rd := FPSR */ - REG(rd) = ufp->status; + REG(ur, rd) = ufp->status; if(fpemudebug) print("MOVW FPSR, R%d\n", rd); break; case 4: /* FPCR := Rd */ - ufp->control = REG(rd); + ufp->control = REG(ur, rd); if(fpemudebug) print("MOVW R%d, FPCR\n", rd); break; case 5: /* Rd := FPCR */ - REG(rd) = ufp->control; + REG(ur, rd) = ufp->control; if(fpemudebug) print("MOVW FPCR, R%d\n", rd); break; @@ -417,7 +412,7 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) fm = &fpconst[op&7]; tag = 'C'; }else{ - fm = &FR(op&7); + fm = &FR(ufp, op&7); tag = 'F'; } rd = (op>>12)&7; @@ -429,7 +424,7 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) unimp(pc, op); if(fpemudebug) print("%s %c%ld,F%d\n", fp->name, tag, op&7, rd); - (*fp->f)(fm, &FR(rd)); + (*fp->f)(fm, &FR(ufp, rd)); } else { FP2 *fp; fp = &optab2[o]; @@ -438,7 +433,7 @@ fpemu(ulong pc, ulong op, Ureg *ur, FPsave *ufp) rn = (op>>16)&7; if(fpemudebug) print("%s %c%ld,F%d,F%d\n", fp->name, tag, op&7, rn, rd); - (*fp->f)(*fm, FR(rn), &FR(rd)); + (*fp->f)(*fm, FR(ufp, rn), &FR(ufp, rd)); } } @@ -464,9 +459,11 @@ fpiarm(Ureg *ur) ufp->control = 0; ufp->status = (0x01<<28)|(1<<12); /* software emulation, alternative C flag */ for(n = 0; n < 8; n++) - FR(n) = fpconst[0]; + FR(ufp, n) = fpconst[0]; } for(n=0; ;n++){ + if(fpemudebug) + print("0x%8.8lux ", ur->pc); validaddr(ur->pc, 4, 0); op = *(ulong*)(ur->pc); o = (op>>24) & 0xF; @@ -476,5 +473,6 @@ fpiarm(Ureg *ur) fpemu(ur->pc, op, ur, ufp); ur->pc += 4; } + if(fpemudebug) print("\n"); return n; } diff --git a/bitsy/l.s b/bitsy/l.s index 98ef5d74c82484520547c3ec798d4787e5f0a4e4..dbe3ae1ccae6a261ec2641a704679a099ab88307 100644 --- a/bitsy/l.s +++ b/bitsy/l.s @@ -289,6 +289,7 @@ _vswitch: MOVW $setR12(SB), R12 /* Make sure we've got the kernel's SB loaded */ MOVW R13, R0 /* first arg is pointer to ureg */ SUB $8, R13 /* space for argument+link (for debugger) */ + MOVW $0xdeaddead,R11 /* marker */ BL trap(SB) diff --git a/bitsy/trap.c b/bitsy/trap.c index 032750f1fc85164ac31d10d104357d2f17c902bd..4a942c01d7042f9f3801a5898d6a57f24e43619c 100644 --- a/bitsy/trap.c +++ b/bitsy/trap.c @@ -178,7 +178,7 @@ trap(Ureg *ureg) ulong inst; int found; Vctl *v; - int user; + int user, x, rv; ulong va; char buf[ERRLEN]; @@ -266,13 +266,11 @@ trap(Ureg *ureg) break; case PsrMund: /* undefined instruction */ /* start of Inferno code [SJM] */ - spllo(); - if (waserror()) { - warnregs(ureg, "floating point error"); - panic("floating point error"); - } if (user) { - if (!fpiarm(ureg)) { + x = spllo(); + rv = fpiarm(ureg); + splx(x); + if (rv == 0) { sprint(buf, "undefined instruction: pc 0x%lux\n", ureg->pc); postnote(up, 1, buf, NDebug); } @@ -280,7 +278,6 @@ trap(Ureg *ureg) warnregs(ureg, "undefined instruction"); panic("undefined instruction"); } - poperror(); /* end of Inferno code [SJM] */ break; }