3 files changed, 33 insertions(+), 26 deletions(-)

M pc/clock.c
M pc/kbd.c
M pc/trap.c

@@ 22,6 22,7 @@ enum
 
 	/* modes */
 	Square=	0x36,		/* perioic square wave */
+	Trigger= 0x30,		/* interrupt on terminal count */
 
 	Freq=	1193182,	/* Real clock frequency */
 };


@@ 47,10 48,18 @@ clock(Ureg *ur, void *arg)
 {
 	Proc *p;
 	int nrun = 0;
+	int islow = 0;
 	extern int hwcursor;
 
 	USED(arg);
 
+	/*
+	 *  set clock for 1/HZ seconds
+	 */
+	outb(Tmode, Load0|Trigger);
+	outb(T0cntr, (Freq/HZ));	/* low byte */
+	outb(T0cntr, (Freq/HZ)>>8);	/* high byte */
+
 	m->ticks++;
 
 	uartclock();


@@ 75,19 84,28 @@ clock(Ureg *ur, void *arg)
 			sched();
 	
 		/* user profiling clock */
+		islow = 1;
 		spllo();		/* in case we fault */
 		(*(ulong*)(USTKTOP-BY2WD)) += TK2MS(1);
-		splhi();
 	}
 
+	/*
+	 *  anything from here down can be running spllo()
+	 */
+
 	/* last because it could spllo() */
 	if(hwcursor)
 		mouseclock();
 	else {
-		spllo();
+		if(!islow){
+			islow = 1;
+			spllo();
+		}
 		mouseclock();
-		splhi();
 	}
+
+	if(islow)
+		splhi();
 }
 
 /*


@@ 131,9 149,9 @@ clockinit(void)
 	setvec(Clockvec, clock, 0);
 
 	/*
-	 *  make clock output a square wave with a 1/HZ period
+	 *  set clock for 1/HZ seconds
 	 */
-	outb(Tmode, Load0|Square);
+	outb(Tmode, Load0|Trigger);
 	outb(T0cntr, (Freq/HZ));	/* low byte */
 	outb(T0cntr, (Freq/HZ)>>8);	/* high byte */
 

@@ 217,7 217,7 @@ i8042reset(void)
 	 *  this works for dhog
 	 */
 	outready();
-	outb(Cmd, 0xFE);	/* pulse reset line */
+	outb(Cmd, 0xFE);	/* pulse reset line (means resend on AT&T machines) */
 	outready();
 	/*
 	 *  this is the old IBM way


@@ 225,9 225,13 @@ i8042reset(void)
 	outready();
 	outb(Cmd, 0xD1);
 	outready();
-	delay(100);
 	outb(Data, 0xDE);	/* set reset line high */
 	outready();
+	delay(100);
+	outb(Cmd, 0xD1);
+	outready();
+	outb(Data, 0xDF);	/* set reset line low */
+	outready();
 }
 
 /*

@@ 183,8 183,8 @@ trapinit(void)
 	 *  Set the 8259 as master with edge triggered
 	 *  input with fully nested interrupts.
 	 */
-	outb(Int0ctl, 0x11);		/* ICW1 - edge triggered, master,
-					   ICW4 will be sent */
+	outb(Int0ctl, (1<<4)|(1<<3)|(1<<0));	/* ICW1 - master, level triggered,
+					  	 ICW4 will be sent */
 	outb(Int0aux, Int0vec);		/* ICW2 - interrupt vector offset */
 	outb(Int0aux, 0x04);		/* ICW3 - have slave on level 2 */
 	outb(Int0aux, 0x01);		/* ICW4 - 8086 mode, not buffered */


@@ 195,8 195,8 @@ trapinit(void)
 	 *  Set the 8259 as master with edge triggered
 	 *  input with fully nested interrupts.
 	 */
-	outb(Int1ctl, 0x11);		/* ICW1 - edge triggered, master,
-					   ICW4 will be sent */
+	outb(Int1ctl, (1<<4)|(1<<3)|(1<<0));	/* ICW1 - master, level triggered,
+					  	 ICW4 will be sent */
 	outb(Int1aux, Int1vec);		/* ICW2 - interrupt vector offset */
 	outb(Int1aux, 0x02);		/* ICW3 - I am a slave on level 2 */
 	outb(Int1aux, 0x01);		/* ICW4 - 8086 mode, not buffered */


@@ 222,9 222,6 @@ char *excname[] =
 [13]	"general protection violation",
 };
 
-Ureg lasttrap, *lastur;
-Proc *lastup;
-
 
 /*
  *  All traps come here.  It is slower to have all traps call trap() rather than


@@ 265,9 262,6 @@ trap(Ureg *ur)
 	}
 
 	if(v>=256 || (h = halloc.ivec[v]) == 0){
-lasttrap = *ur;
-lastur = ur;
-lastup = up;
 		/* an old 386 generates these fairly often, no idea why */
 		if(v == 13)
 			return;


@@ 307,10 301,6 @@ lastup = up;
 	splhi();
 	if(user && (up->procctl || up->nnote))
 		notify(ur);
-
-lastup = up;
-lasttrap = *ur;
-lastur = ur;
 }
 
 /*


@@ 349,11 339,6 @@ dumpregs(Ureg *ur)
 	dumpregs2(ur);
 	print("  magic %lux %lux %lux\n", x[0], x[1], x[2]);
 	print("  ur %lux up %lux\n", ur, up);
-	dumpregs2(&lasttrap);
-	print("  lastur %lux lastup %lux\n", lastur);
-splhi();
-dumpstack();
-for(;;);
 }
 
 void