~kris/9p

9hist

0bfcefded9010495d808abdbd69a1d2891778b1c — David du Colombier 32 years ago 5365c86
Plan 9 from Bell Labs 1994-06-09
8 files changed, 218 insertions(+), 148 deletions(-)

M carrera/dat.h
M carrera/fptrap.c
M carrera/l.s
M carrera/main.c
M carrera/mem.h
M carrera/trap.c
A carrera/ureg.h
M pc/main.c
M carrera/dat.h => carrera/dat.h +2 -2
@@ 15,7 15,7 @@ typedef struct Ureg	Ureg;
/*
 *  parameters for sysproc.c
 */
#define AOUT_MAGIC	V_MAGIC
#define AOUT_MAGIC	V_MAGIC || magic==M_MAGIC

/*
 *  machine dependent definitions used by ../port/dat.h


@@ 81,7 81,7 @@ struct PMMU
struct Notsave
{
	ulong	svstatus;
	ulong	svr1;
	uvlong	svr1;
};

#include "../port/portdat.h"

M carrera/fptrap.c => carrera/fptrap.c +6 -5
@@ 34,10 34,10 @@ fptrap(Ureg *ur)

print("fpt: %d %s %lux\n", up->pid, up->text, up->fpsave.fpstatus);

	iw = ur->pc;
	if(ur->cause & (1<<31))
		iw = *(ulong*)(ur->pc+4);
	else
		iw = *(ulong*)ur->pc;
		iw += 4;
	iw = *(ulong*)iw;

	if(fpunimp(iw) == 0)
		return;


@@ 174,7 174,7 @@ fpunimp(ulong iw)
	return 0;
}

static ulong*
static uvlong*
reg(Ureg *ur, int regno)
{
	/* regs go from R31 down in ureg, R29 is missing */


@@ 192,7 192,8 @@ branch(Ureg *ur, ulong fcr31)
{
	ulong iw, npc, rs, rt, rd, offset;

	iw = *(ulong*)ur->pc;
	iw = ur->pc;
	iw = *(ulong*)iw;
	rs = (iw>>21) & 0x1F;
	if(rs)
		rs = *reg(ur, rs);

M carrera/l.s => carrera/l.s +103 -124
@@ 12,10 12,6 @@
/*
 *  R4000 instructions
 */
#define	LD(offset, base, rt)	WORD	$((067<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
#define	STD(rt, offset, base)	WORD	$((077<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
#define	DSLL(sa, rt, rd)	WORD	$(((rt)<<16)|((rd)<<11)|((sa)<<6)|070)
#define	DSRA(sa, rt, rd)	WORD	$(((rt)<<16)|((rd)<<11)|((sa)<<6)|073)
#define	LL(base, rt)		WORD	$((060<<26)|((base)<<21)|((rt)<<16))
#define	SC(base, rt)		WORD	$((070<<26)|((base)<<21)|((rt)<<16))



@@ 26,16 22,13 @@
 */
TEXT	start(SB), $-4

DBG(0x55aa0000)
	MOVW	$setR30(SB), R30
	MOVW	$(CU1|INTR7|INTR6|INTR5|INTR4|INTR3|INTR2|INTR1|INTR0), R1
	MOVW	R1, M(STATUS)
	WAIT
DBG(0x55aa0001)

	MOVW	$TLBROFF, R1
	MOVW	R1, M(WIRED)
DBG(0x55aa0002)

	MOVW	$((0x1C<<7)|(1<<24)), R1
	MOVW	R1, FCR31	/* permit only inexact and underflow */


@@ 57,19 50,14 @@ DBG(0x55aa0002)
	MOVD	F24, F18
	MOVD	F24, F20
	MOVD	F24, F22
DBG(0x55aa0003)

	MOVW	$MACHADDR, R(MACH)
	ADDU	$(BY2PG-4), R(MACH), SP
	MOVW	$0, R(USER)
DBG(0x55aa0010)
MOVW R(MACH),4(R20)
	MOVW	R0, 0(R(MACH))
DBG(0x55aa0011)

	MOVW	$edata(SB), R1
	MOVW	$end(SB), R2
DBG(0x55aa0004)

clrbss:
	MOVB	$0, (R1)


@@ 93,11 81,11 @@ TEXT	touser(SB), $-4
	MOVW	M(STATUS), R4
	WAIT
	AND	$(~KMODEMASK), R4
	OR	$(KUSER|EXL|IE), R4
	OR	$(KUSER|EXL|IE|UX), R4
	MOVW	R4, M(STATUS)
	WAIT
	MOVW	R1, SP
	MOVW	R2, M(EPC)
	MOVV	R2, M(EPC)
	ERET

TEXT	firmware(SB), $0


@@ 286,6 274,7 @@ TEXT	gettlbvirt(SB), $0
	NOOP
	RET

/* also vector80 */
TEXT	vector0(SB), $-4
	NOOP4
	NOOP4


@@ 372,34 361,33 @@ TEXT	vector180(SB), $-4
	NOOP4
	MOVW	$exception(SB), R26
	JMP	(R26)
	NOP

TEXT	exception(SB), $-4
	MOVW	M(STATUS), R26
	WAIT
	AND	$KUSER, R26
	BEQ	R26, waskernel

wasuser:
	CONST	(MACHADDR, R27)		/* R27 = m-> */
	MOVW	8(R27), R26		/* R26 = m->proc */
	MOVW	8(R26), R27		/* R27 = m->proc->kstack */
	MOVW	SP, R26			/* save user sp */
	ADDU	$(KSTACK-UREGSIZE-2*BY2WD), R27, SP
	MOVV	SP, R26			/* save user sp */
	ADDU	$(KSTACK-UREGSIZE), R27, SP

	MOVW	R26, 0x10(SP)			/* user SP */
	MOVW	R31, 0x28(SP)
	MOVW	R30, 0x2C(SP)
	MOVV	R26, Ureg_sp(SP)		/* user SP */
	MOVV	R31, Ureg_r31(SP)
	MOVV	R30, Ureg_r30(SP)
	MOVW	M(CAUSE), R26
	MOVW	R(MACH), 0x3C(SP)
	MOVW	R(USER), 0x40(SP)
	MOVV	R25, Ureg_r25(SP)		/* R(USER), R(MACH) */
	MOVV	R24, Ureg_r24(SP)
	AND	$(EXCMASK<<2), R26
	SUBU	$(CSYS<<2), R26

	JAL	saveregs(SB)

	MOVW	$setR30(SB), R30
	CONST	(MACHADDR, R1)
	MOVW	R1, R(MACH)			/* R(MACH) = m-> */
	CONST	(MACHADDR, R(MACH))		/* R(MACH) = m-> */
	MOVW	8(R(MACH)), R(USER)		/* up = m->proc */
	MOVW	4(SP), R1			/* first arg for syscall/trap */
	BNE	R26, notsys


@@ 407,62 395,60 @@ wasuser:
	JAL	syscall(SB)

sysrestore:
	MOVW	0x28(SP), R31
	MOVW	0x08(SP), R26
	MOVW	0x2C(SP), R30
	MOVV	Ureg_r31(SP), R31
	MOVW	Ureg_status(SP), R26
	MOVV	Ureg_r30(SP), R30
	MOVW	R26, M(STATUS)
	WAIT
	MOVW	0x0C(SP), R26		/* old pc */
	MOVW	0x10(SP), SP
	MOVW	R26, M(EPC)
	MOVV	Ureg_pc(SP), R26		/* old pc */
	MOVV	Ureg_sp(SP), SP
	MOVV	R26, M(EPC)
	ERET

notsys:
	JAL	trap(SB)
restore:
	JAL	restregs(SB)
	MOVW	0x28(SP), R31
	MOVW	0x2C(SP), R30
	MOVW	0x3C(SP), R(MACH)
	MOVW	0x40(SP), R(USER)
	MOVW	0x10(SP), SP
	MOVW	R26, M(EPC)
	MOVV	Ureg_r31(SP), R31
	MOVV	Ureg_r30(SP), R30
	MOVV	Ureg_r25(SP), R25			/* R(USER), R(MACH) */
	MOVV	Ureg_r24(SP), R24
	MOVV	Ureg_sp(SP), SP
	MOVV	R26, M(EPC)
	ERET

waskernel:
	MOVW	$1, R26			/* not syscall */
	MOVW	SP, -(UREGSIZE-16)(SP)
	MOVV	SP, R26
	SUBU	$UREGSIZE, SP
	MOVW	R31, 0x28(SP)
	OR	$7, SP
	XOR	$7, SP
	MOVV	R26, Ureg_sp(SP)
	MOVV	R31, Ureg_r31(SP)
	MOVW	$1, R26			/* not syscall */
	JAL	saveregs(SB)
	MOVW	4(SP), R1		/* first arg for trap */
	JAL	trap(SB)
	JAL	restregs(SB)
	MOVW	0x28(SP), R31
	ADDU	$UREGSIZE, SP
	MOVW	R26, M(EPC)
	MOVV	Ureg_r31(SP), R31
	MOVV	Ureg_sp(SP), SP
	MOVV	R26, M(EPC)
	ERET

TEXT	forkret(SB), $0
	MOVW	R0, R1			/* Fake out system call return */
TEXT	forkret(SB), $-4
	MOVV	R0, R1			/* Fake out system call return */
	JMP	sysrestore

TEXT	saveregs(SB), $-4
	MOVW	R1, 0x9C(SP)
	MOVW	R2, 0x98(SP)
	/* save R5, R6 as 64 bits */
	ADDU	$(UREGSIZE-16), SP, R1
	MOVW	$~7, R2			/* don't let him use R28 */
	AND		R2, R1
	STD		(5, 0,(1))
	STD		(6, 8,(1))
	ADDU	$8, SP, R1
	MOVW	R1, 0x04(SP)		/* arg to base of regs */
	MOVV	R1, Ureg_r1(SP)		/* save early to use as temp */
	MOVV	R2, Ureg_r2(SP)

	ADDU	$Uoffset,SP, R1
	MOVW	R1, 4(SP)		/* arg to base of regs */
	MOVW	M(STATUS), R1
	MOVW	M(EPC), R2
	MOVV	M(EPC), R2
	WAIT
	MOVW	R1, 0x08(SP)
	MOVW	R2, 0x0C(SP)
	MOVW	R1, Ureg_status(SP)
	MOVV	R2, Ureg_pc(SP)

	MOVW	$(~KMODEMASK),R2	/* don't let him use R28 */
	AND	R2, R1


@@ 471,93 457,86 @@ TEXT	saveregs(SB), $-4
	BEQ	R26, return		/* sys call, don't save */

	MOVW	M(CAUSE), R1
	MOVW	M(BADVADDR), R2
	MOVV	M(BADVADDR), R2
	NOOP
	MOVW	R1, 0x14(SP)
	MOVW	M(TLBVIRT), R1
	MOVW	R1, Ureg_cause(SP)
	MOVV	M(TLBVIRT), R1
	NOOP
	MOVW	R2, 0x18(SP)
	MOVW	R1, 0x1C(SP)
	MOVV	R2, Ureg_badvaddr(SP)
	MOVV	R1, Ureg_tlbvirt(SP)
	MOVW	HI, R1
	MOVW	LO, R2
	MOVW	R1, 0x20(SP)
	MOVW	R2, 0x24(SP)
	MOVV	R1, Ureg_hi(SP)
	MOVV	R2, Ureg_lo(SP)
					/* LINK,SB,SP missing */
	MOVW	R28, 0x30(SP)
	MOVV	R28, Ureg_r28(SP)
					/* R27, R26 not saved */
					/* R25, R24 missing */
	MOVW	R23, 0x44(SP)
	MOVW	R22, 0x48(SP)
	MOVW	R21, 0x4C(SP)
	MOVW	R20, 0x50(SP)
	MOVW	R19, 0x54(SP)
	MOVW	R18, 0x58(SP)
	MOVW	R17, 0x5C(SP)
	MOVW	R16, 0x60(SP)
	MOVW	R15, 0x64(SP)
	MOVW	R14, 0x68(SP)
	MOVW	R13, 0x6C(SP)
	MOVW	R12, 0x70(SP)
	MOVW	R11, 0x74(SP)
	MOVW	R10, 0x78(SP)
	MOVW	R9, 0x7C(SP)
	MOVW	R8, 0x80(SP)
	MOVW	R7, 0x84(SP)
	MOVW	R6, 0x88(SP)
	MOVW	R5, 0x8C(SP)
	MOVW	R4, 0x90(SP)
	MOVW	R3, 0x94(SP)
	MOVV	R23, Ureg_r23(SP)
	MOVV	R22, Ureg_r22(SP)
	MOVV	R21, Ureg_r21(SP)
	MOVV	R20, Ureg_r20(SP)
	MOVV	R19, Ureg_r19(SP)
	MOVV	R18, Ureg_r18(SP)
	MOVV	R17, Ureg_r17(SP)
	MOVV	R16, Ureg_r16(SP)
	MOVV	R15, Ureg_r15(SP)
	MOVV	R14, Ureg_r14(SP)
	MOVV	R13, Ureg_r13(SP)
	MOVV	R12, Ureg_r12(SP)
	MOVV	R11, Ureg_r11(SP)
	MOVV	R10, Ureg_r10(SP)
	MOVV	R9, Ureg_r9(SP)
	MOVV	R8, Ureg_r8(SP)
	MOVV	R7, Ureg_r7(SP)
	MOVV	R6, Ureg_r6(SP)
	MOVV	R5, Ureg_r5(SP)
	MOVV	R4, Ureg_r4(SP)
	MOVV	R3, Ureg_r3(SP)
return:
	RET

TEXT	restregs(SB), $-4
					/* LINK,SB,SP missing */
	MOVW	0x30(SP), R28
	MOVV	Ureg_r28(SP), R28
					/* R27, R26 not saved */
					/* R25, R24 missing */
	MOVW	0x44(SP), R23
	MOVW	0x48(SP), R22
	MOVW	0x4C(SP), R21
	MOVW	0x50(SP), R20
	MOVW	0x54(SP), R19
	MOVW	0x58(SP), R18
	MOVW	0x5C(SP), R17
	MOVW	0x60(SP), R16
	MOVW	0x64(SP), R15
	MOVW	0x68(SP), R14
	MOVW	0x6C(SP), R13
	MOVW	0x70(SP), R12
	MOVW	0x74(SP), R11
	MOVW	0x78(SP), R10
	MOVW	0x7C(SP), R9
	MOVW	0x80(SP), R8
	MOVW	0x84(SP), R7
	/*
	 * restored below
	 * MOVW	0x88(SP), R6
	 * MOVW	0x8C(SP), R5
	 */
	MOVW	0x90(SP), R4
	MOVW	0x94(SP), R3
	MOVW	0x24(SP), R2
	MOVW	0x20(SP), R1
	MOVV	Ureg_r23(SP), R23
	MOVV	Ureg_r22(SP), R22
	MOVV	Ureg_r21(SP), R21
	MOVV	Ureg_r20(SP), R20
	MOVV	Ureg_r19(SP), R19
	MOVV	Ureg_r18(SP), R18
	MOVV	Ureg_r17(SP), R17
	MOVV	Ureg_r16(SP), R16
	MOVV	Ureg_r15(SP), R15
	MOVV	Ureg_r14(SP), R14
	MOVV	Ureg_r13(SP), R13
	MOVV	Ureg_r12(SP), R12
	MOVV	Ureg_r11(SP), R11
	MOVV	Ureg_r10(SP), R10
	MOVV	Ureg_r9(SP), R9
	MOVV	Ureg_r8(SP), R8
	MOVV	Ureg_r7(SP), R7
	MOVV	Ureg_r6(SP), R6
	MOVV	Ureg_r5(SP), R5
	MOVV	Ureg_r4(SP), R4
	MOVV	Ureg_r3(SP), R3

	MOVV	Ureg_lo(SP), R2
	MOVV	Ureg_hi(SP), R1
	MOVW	R2, LO
	MOVW	R1, HI
	/* restore 64-bit R5, R6 */
	ADDU	$(UREGSIZE-16), SP, R1
	MOVW	$~7, R2			/* don't let him use R28 */
	AND		R2, R1
	LD		(0,(1), 5)
	LD		(8,(1), 6)
	MOVW	0x08(SP), R1
	MOVW	0x98(SP), R2

	MOVW	Ureg_status(SP), R1
	MOVV	Ureg_r2(SP), R2
	MOVW	R1, M(STATUS)
	WAIT
	MOVW	0x9C(SP), R1
	MOVW	0x0C(SP), R26		/* old pc */
	MOVV	Ureg_r1(SP), R1
	MOVV	Ureg_pc(SP), R26		/* old pc */
	RET

TEXT	rfnote(SB), $0
TEXT	rfnote(SB), $-4
	MOVW	R1, R26			/* 1st arg is &uregpointer */
	SUBU	$(BY2WD), R26, SP	/* pc hole */
	JMP	restore

M carrera/main.c => carrera/main.c +2 -1
@@ 310,7 310,8 @@ iomapinit(void)
void
vecinit(void)
{
	memmove((ulong*)UTLBMISS, (ulong*)vector0, 0x100);
	memmove((ulong*)UTLBMISS, (ulong*)vector0, 0x80);
	memmove((ulong*)XEXCEPTION, (ulong*)vector0, 0x80);
	memmove((ulong*)CACHETRAP, (ulong*)vector100, 0x80);
	memmove((ulong*)EXCEPTION, (ulong*)vector180, 0x80);


M carrera/mem.h => carrera/mem.h +43 -2
@@ 66,6 66,7 @@
#define ERL		0x00000004
#define KSUPER		0x00000008
#define KUSER		0x00000010
#define UX		0x00000020
#define INTMASK		0x0000ff00
#define INTR0		0x00000100
#define INTR1		0x00000200


@@ 98,8 99,48 @@
 * Fundamental addresses
 */
#define	MACHADDR	(KTZERO-MAXMACH*BY2PG)	/* warning: rdbg is near here */
/* Sizeof(Ureg)+R5,R6+16 bytes slop+retpc & ur */
#define	UREGSIZE	0xC0		
/* Sizeof(Ureg)+retpc & ur+16 bytes slop */
#define	UREGSIZE	(36*8 + 2*4 + 2*4 + 16)
#define	Uoffset		8

#define	Ureg_status	(Uoffset+0)
#define	Ureg_cause	(Uoffset+4)
#define	Ureg_pc		(Uoffset+8)
#define	Ureg_sp		(Uoffset+16)
#define	Ureg_badvaddr	(Uoffset+24)
#define	Ureg_tlbvirt	(Uoffset+32)
#define	Ureg_hi		(Uoffset+40)
#define	Ureg_lo		(Uoffset+48)
#define	Ureg_r31	(Uoffset+56)
#define	Ureg_r30	(Uoffset+64)
#define	Ureg_r28	(Uoffset+72)
#define	Ureg_r27	(Uoffset+80)
#define	Ureg_r26	(Uoffset+88)
#define	Ureg_r25	(Uoffset+96)
#define	Ureg_r24	(Uoffset+104)
#define	Ureg_r23	(Uoffset+112)
#define	Ureg_r22	(Uoffset+120)
#define	Ureg_r21	(Uoffset+128)
#define	Ureg_r20	(Uoffset+136)
#define	Ureg_r19	(Uoffset+144)
#define	Ureg_r18	(Uoffset+152)
#define	Ureg_r17	(Uoffset+160)
#define	Ureg_r16	(Uoffset+168)
#define	Ureg_r15	(Uoffset+176)
#define	Ureg_r14	(Uoffset+184)
#define	Ureg_r13	(Uoffset+192)
#define	Ureg_r12	(Uoffset+200)
#define	Ureg_r11	(Uoffset+208)
#define	Ureg_r10	(Uoffset+216)
#define	Ureg_r9		(Uoffset+224)
#define	Ureg_r8		(Uoffset+232)
#define	Ureg_r7		(Uoffset+240)
#define	Ureg_r6		(Uoffset+248)
#define	Ureg_r5		(Uoffset+256)
#define	Ureg_r4		(Uoffset+264)
#define	Ureg_r3		(Uoffset+272)
#define	Ureg_r2		(Uoffset+280)
#define	Ureg_r1		(Uoffset+288)
#define	MACHP(n)	((Mach *)(MACHADDR+(n)*BY2PG))

/*

M carrera/trap.c => carrera/trap.c +15 -14
@@ 253,7 253,7 @@ trap(Ureg *ur)
			postnote(up, 1, buf, NDebug);
			break;
		}
		print("kernel %s pc=%lux\n", excname[ecode], ur->pc);
		print("kernel %s pc=%llux\n", excname[ecode], ur->pc);
		dumpregs(ur);
		dumpstack();
		if(m->machno == 0)


@@ 373,7 373,7 @@ fpexcname(Ureg *ur, ulong fcr31, char *buf)
{
	int i;
	char *s;
	ulong fppc;
	uvlong fppc;

	fppc = ur->pc;
	if(ur->cause & (1<<31))	/* branch delay */


@@ 392,7 392,7 @@ fpexcname(Ureg *ur, ulong fcr31, char *buf)
	if(s == 0)
		return "no floating point exception";

	sprint(buf, "%s fppc=0x%lux", s, fppc);
	sprint(buf, "%s fppc=0x%llux", s, fppc);
	return buf;
}



@@ 402,7 402,7 @@ void
kernfault(Ureg *ur, int code)
{
	print("kfault %s badvaddr=0x%lux\n", excname[code], ur->badvaddr);
	print("UP=0x%lux SR=0x%lux PC=0x%lux R31=%lux SP=0x%lux\n",
	print("UP=0x%lux SR=0x%lux PC=0x%llux R31=%llux SP=0x%llux\n",
				up, ur->status, ur->pc, ur->r31, ur->sp);

	dumpregs(ur);


@@ 465,10 465,10 @@ notify(Ureg *ur)
	n = &up->note[0];
	if(strncmp(n->msg, "sys:", 4) == 0) {
		l = strlen(n->msg);
		if(l > ERRLEN-15)	/* " pc=0x12345678\0" */
			l = ERRLEN-15;
		if(l > ERRLEN-23)	/* " pc=0x12345678\0" */
			l = ERRLEN-23;

		sprint(n->msg+l, " pc=0x%lux", ur->pc);
		sprint(n->msg+l, " pc=0x%llux", ur->pc);
	}

	if(n->flag != NUser && (up->notified || up->notify==0)) {


@@ 490,10 490,11 @@ notify(Ureg *ur)
		pexit(n->msg, n->flag!=NDebug);
	}
	up->svstatus = ur->status;
	sp = ur->usp - sizeof(Ureg);
	sp = ur->usp & ~(BY2V-1);
	sp -= sizeof(Ureg);

	if(sp&0x3 || !okaddr((ulong)up->notify, BY2WD, 0)
	|| !okaddr(sp-ERRLEN-3*BY2WD, sizeof(Ureg)+ERRLEN-3*BY2WD, 1)) {
	if(!okaddr((ulong)up->notify, BY2WD, 0) ||
	   !okaddr(sp-ERRLEN-3*BY2WD, sizeof(Ureg)+ERRLEN-3*BY2WD, 1)) {
		pprint("suicide: bad address or sp in notify\n");
		qunlock(&up->debug);
		pexit("Suicide", 0);


@@ 507,8 508,8 @@ notify(Ureg *ur)
	*(ulong*)(sp+2*BY2WD) = sp+3*BY2WD;	/* arg 2 is string */
	up->svr1 = ur->r1;			/* save away r1 */
	ur->r1 = (ulong)up->ureg;		/* arg 1 is ureg* */
	*(ulong*)(sp+1*BY2WD) = (ulong)up->ureg;	/* arg 1 0(FP) is ureg* */
	*(ulong*)(sp+0*BY2WD) = 0;		/* arg 0 is pc */
	((ulong*)sp)[1] = (ulong)up->ureg;	/* arg 1 0(FP) is ureg* */
	((ulong*)sp)[0] = 0;			/* arg 0 is pc */
	ur->usp = sp;
	ur->pc = (ulong)up->notify;
	up->notified = 1;


@@ 607,13 608,13 @@ syscall(Ureg *aur)
		goto error;

	if(up->scallnr >= nsyscall){
		pprint("bad sys call %d pc %lux\n", up->scallnr, ur->pc);
		pprint("bad sys call %d pc %llux\n", up->scallnr, ur->pc);
		postnote(up, 1, "sys: bad sys call", NDebug);
		error(Ebadarg);
	}

	if(sp & (BY2WD-1)){
		pprint("odd sp in sys call pc %lux sp %lux\n", ur->pc, ur->sp);
		pprint("odd sp in sys call pc %llux sp %llux\n", ur->pc, ur->sp);
		postnote(up, 1, "sys: odd stack", NDebug);
		error(Ebadarg);
	}

A carrera/ureg.h => carrera/ureg.h +46 -0
@@ 0,0 1,46 @@

struct Ureg
{
	ulong	status;
	ulong	cause;
	uvlong	pc;
	union{
		uvlong	sp;
		uvlong	usp;
	};
	uvlong	badvaddr;
	uvlong	tlbvirt;

	uvlong	hi;
	uvlong	lo;
	uvlong	r31;
	uvlong	r30;
	uvlong	r28;
	uvlong	r27;
	uvlong	r26;
	uvlong	r25;
	uvlong	r24;
	uvlong	r23;
	uvlong	r22;
	uvlong	r21;
	uvlong	r20;
	uvlong	r19;
	uvlong	r18;
	uvlong	r17;
	uvlong	r16;
	uvlong	r15;
	uvlong	r14;
	uvlong	r13;
	uvlong	r12;
	uvlong	r11;
	uvlong	r10;
	uvlong	r9;
	uvlong	r8;
	uvlong	r7;
	uvlong	r6;
	uvlong	r5;
	uvlong	r4;
	uvlong	r3;
	uvlong	r2;
	uvlong	r1;
};

M pc/main.c => pc/main.c +1 -0
@@ 63,6 63,7 @@ main(void)
	chandevreset();
	swapinit();
	userinit();
print("CR0 %lux\n", getcr0());
	schedinit();
}