5 files changed, 24 insertions(+), 20 deletions(-)

M pc/clock.c
M pc/devvga.c
M pc/l.s
M pc/trap.c
M port/sysproc.c

@@ 52,13 52,6 @@ clock(Ureg *ur, void *arg)
 
 	USED(arg);
 
-	/*
-	 *  set clock for 1/HZ seconds
-	 */
-	outb(Tmode, Load0|Trigger);
-	outb(T0cntr, (Freq/HZ));	/* low byte */
-	outb(T0cntr, (Freq/HZ)>>8);	/* high byte */
-
 	m->ticks++;
 
 	uartclock();


@@ 145,7 138,7 @@ clockinit(void)
 	/*
 	 *  set clock for 1/HZ seconds
 	 */
-	outb(Tmode, Load0|Trigger);
+	outb(Tmode, Load0|Square);
 	outb(T0cntr, (Freq/HZ));	/* low byte */
 	outb(T0cntr, (Freq/HZ)>>8);	/* high byte */
 

@@ 177,14 177,16 @@ enum
 	Qvgatype=	2,
 	Qvgaport=	3,
 	Qvgaportw=	4,
-	Qvgactl=	5,
-	Nvga=		5,
+	Qvgaportl=	5,
+	Qvgactl=	6,
+	Nvga=		6,
 };
 Dirtab vgadir[]={
 	"vgasize",	{Qvgasize},	0,		0666,
 	"vgatype",	{Qvgatype},	0,		0666,
 	"vgaport",	{Qvgaport},	0,		0666,
 	"vgaportw",	{Qvgaportw},	0,		0666,
+	"vgaportl",	{Qvgaportl},	0,		0666,
 	"vgactl",	{Qvgactl},	0,		0666,
 };
 


@@ 250,6 252,7 @@ vgaread(Chan *c, void *buf, long n, ulong offset)
 	uchar *cp;
 	char cbuf[64];
 	ushort *sp;
+	ulong *lp;
 
 	switch(c->qid.path&~CHDIR){
 	case Qdir:


@@ 271,6 274,13 @@ vgaread(Chan *c, void *buf, long n, ulong offset)
 		for (sp = buf, port=offset; port<offset+n; port+=2)
 			*sp++ = ins(port);
 		return n*2;
+	case Qvgaportl:
+		if((n & 03) || (offset & 03))
+			error(Ebadarg);
+		n /= 4;
+		for (lp = buf, port=offset; port<offset+n; port+=4)
+			*lp++ = inl(port);
+		return n*4;
 	}
 	error(Eperm);
 	return 0;


@@ 283,6 293,7 @@ vgawrite(Chan *c, void *buf, long n, ulong offset)
 	Vgacard *vp;
 	int port, maxx, maxy, ldepth;
 	ushort *sp;
+	ulong *lp;
 
 	switch(c->qid.path&~CHDIR){
 	case Qdir:


@@ 355,6 366,13 @@ vgawrite(Chan *c, void *buf, long n, ulong offset)
 		for (sp = buf, port=offset; port<offset+n; port+=2)
 			outs(port, *sp++);
 		return n*2;
+	case Qvgaportl:
+		if((n & 03) || (offset & 03))
+			error(Ebadarg);
+		n /= 4;
+		for (lp = buf, port=offset; port<offset+n; port+=4)
+			outl(port, *lp++);
+		return n*4;
 	}
 	error(Eperm);
 	return 0;

@@ 186,7 186,6 @@ TEXT	inss(SB),$0
 TEXT	inl(SB), $0
 
 	MOVL	p+0(FP), DX
-	XORL	AX, AX
 	INL
 	RET
 


@@ 205,6 204,7 @@ TEXT	insl(SB),$0
  * output a short to a port
  */
 TEXT	outs(SB), $0
+
 	MOVL	p+0(FP), DX
 	MOVL	s+4(FP), AX
 	OP16; OUTL


@@ 560,13 560,6 @@ TEXT	getstatus(SB),$0
 	RET
 
 /*
- *  do nothing whatsoever till interrupt happens
- */
-TEXT	idle(SB),$0
-	HLT
-	RET
-
-/*
  *  return cpu type (586 == pentium or better)
  */
 TEXT	x86(SB),$0

@@ 183,7 183,7 @@ trapinit(void)
 	 *  Set the 8259 as master with edge triggered
 	 *  input with fully nested interrupts.
 	 */
-	outb(Int0ctl, (1<<4)|(0<<3)|(1<<0));	/* ICW1 - master, level triggered,
+	outb(Int0ctl, (1<<4)|(0<<3)|(1<<0));	/* ICW1 - master, edge triggered,
 					  	 ICW4 will be sent */
 	outb(Int0aux, Int0vec);		/* ICW2 - interrupt vector offset */
 	outb(Int0aux, 0x04);		/* ICW3 - have slave on level 2 */

@@ 216,7 216,7 @@ sysexec(ulong *arg)
 	magic = l2be(exec.magic);
 	text = l2be(exec.text);
 	entry = l2be(exec.entry);
-	if(n==sizeof(Exec) && magic==AOUT_MAGIC){
+	if(n==sizeof(Exec) && (magic==AOUT_MAGIC)){
 		if((text&KZERO)
 		|| entry < UTZERO+sizeof(Exec)
 		|| entry >= UTZERO+sizeof(Exec)+text)